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STM32L4P5CEU6P 数据表(PDF) 264 Page - STMicroelectronics |
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STM32L4P5CEU6P 数据表(HTML) 264 Page - STMicroelectronics |
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264 / 311 page ![]() Electrical characteristics STM32L4P5xx 264/311 DS12903 Rev 2 6.3.29 OCTOSPI characteristics Unless otherwise specified, the parameters given in Table 115 and Table 116 for OCTOSPI are derived from tests performed under the ambient temperature, fAHB frequency and VDD supply voltage conditions summarized in Table 21: General operating conditions, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 11 • Measurement points are done at CMOS levels: 0.5 x VDD Refer to Section 6.3.14: I/O port characteristics for more details on the input/output alternate function characteristics. Table 115. OCTOSPI(1) characteristics in SDR mode(2) Symbol Parameter Conditions Min Typ Max Unit F(QCK) OCTOSPI clock frequency 1.71 V < VDD< 3.6 V Voltage Range V1 CLOAD = 20 pF -- 54 MHz 2.7 V < VDD< 3.6 V Voltage Range V1 CLOAD = 20 pF -- 92 1.71 V < VDD< 3.6 V Voltage Range V1 CLOAD = 15 pF -- 58 1.71 V < VDD< 3.6 V Voltage Range 2 CLOAD = 20 pF -- 26 tw(CKH) OCTOSPI clock high and low time Even division Prescaler[7:0] = n = 0,1,3,5 t(CK)/2-0.5 - t(CK)/2 ns tw(CKL) t(CK)/2-0.5 - t(CK)/2 tw(CKH) OCTOSPI clock high and low time Odd division Prescaler[7:0] = n = 2,4,6,8 (n/2)*t(CK)/(n+1)- 0.5 - (n/2)*t(CK)/(n+1) tw(CKL) (n/2+1)*t(CK)/(n+1) -0.5 - (n/2+1)*t(CK)/(n+1) ts(IN) Data input setup time Voltage Range V1 1 - - Voltage Range V2 0.5 - - th(IN) Data input hold time Voltage Range V1 4.5 - - Voltage Range V2 9.5 - - tv(OUT) Data output valid time Voltage Range V1 - 1 3 Voltage Range V2 - 2 5 th(OUT) Data output hold time Voltage Range V1 0 - - Voltage Range V2 0 - - 1. Values in the table applies to Octal and Quad SPI mode. 2. Guaranteed by characterization results. |
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