Register Set

Version 1.6, February 28, 2006

Proprietary to OmniVision Technologies

21

Omni ision

F8

SS_CTRL

01

RW

SCCB Slave Control

Bit[7:6]:

Reserved

Bit[5]:

Address auto-increase enable

Bit[4]:

Reserved

Bit[3]:

SCCB enable

Bit[2]:

Delay SCCB master clock

Bit[1]:

Enable SCCB master access

Bit[0]:

Enable sensor pass through access

F9

MC_BIST

RW

Bit[7]:

Microcontroller Reset

Bit[6]:

Boot ROM select

Bit[5]:

R/W 1 error for 12K-byte memory

Bit[4]:

R/W 0 error for 12K-byte memory

Bit[3]:

R/W 1 error for 512-byte memory

Bit[2]:

R/W 0 error for 512-byte memory

Bit[1]:

BIST busy bit for read; One-shot reset of

microcontroller for write

Bit[0]:

Launch BIST

FA

MC_AL

RW

Program Memory Pointer Address Low Byte

FB

MC_AH

RW

Program Memory Pointer Address High Byte

FC

MC_D

80

RW

Program Memory Pointer Access Address

Boundary of register address to separate DSP and sensor register

FD

P_CMD

00

RW

SCCB Protocol Command Register

FE

P_STATUS

00

RW

SCCB Protocol Status Register

FF

RA_DLMT

7F

RW

Register Bank Select

Bit[7:1]:

Reserved

Bit[0]:

Register bank select

0:

DSP address

1:

Sensor address

NOTE: All other registers are factory-reserved. Please contact OmniVision Technologies for reference register settings.

Table 12

Device Control Register List (when 0xFF = 00) (Sheet 4 of 4)

Address

(Hex)

Register

Name

Default

(Hex)

R/W

Description