ISD-300LP™ Low-Power USB 2.0 to ATA/ATAPI Bridge IC
CY7C68310
This part is not recommended for new designs
Use CY7C68300B EZ-USB AT2LP™ USB2.0 to ATA/ATAPI
Bridge for new designs
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
, CA 95134
•
408-943-2600
Document 38-08030 Rev. *J
Revised September 15, 2005
1.0
Features
• Fixed-function mass storage device—requires no firmware
code
• USB Mass Storage Class Bulk-Only specification-compliant
(version 1.0)
• USB 2.0-certified (TID# 40001426)
— Integrated USB transceiver
— High-speed (480-Mbit) and full-speed (12-Mbit) support
— USB Suspend/Resume, Remote Wakeup support
• Two power modes of operation—self-powered and USB
bus-powered
— Low power consumption allows for bus-powered opera-
tion
— VBUS-powered CF support
— True USB portable HDD support
• Compact 80-pin TQFP package with a Lead-Free option
• ATA/ATAPI-6 specification-compliant–provides support for
mass storage devices larger than 137GB
• 5V tolerant inputs, 3.3V output drive
• Flexible USB descriptor and configuration retrieval sources
—I2C-compatible serial ROM interface
— ATA interface using vendor-specific ATA command (FBh)
implemented on ATAPI or ATA device
— Default on-chip ROM contents for manufacturing/devel-
opment
• 2-Kbyte SRAM data buffer for ATA/ATAPI data transfers
• ATA interface supports ATA PIO modes 0–4, UDMA modes
0–4 (multiword DMA not supported). ATA interface opera-
tion mode is automatically selected during device initializa-
tion or manually programmed with I2C-compatible configu-
ration data
• Automatic detection of either Master or Slave ATA/ATAPI
devices
• Mode Page 5 Support—increased support for formatting
removable media devices
• ATA Interrupt support for ATAPI devices—offers more ro-
bust ATA support across OS platforms
• System event notification via Vendor-specific ATA com-
mand
— Input pin for media cartridge detection or ejection request
— USB bus state indications (Reset, FS/HS mode of oper-
ation, Suspend/Resume, Bus/Self-powered)
• Three General Purpose I/O (GPIO) pins
• Multiple LUNs supported within a single ATAPI device
• ATA translation provides seamless ATA support with stan-
dard MSC drivers
• Additional ATA command support provided by vendor-spe-
cific ATACBs (ATA command blocks utilizing the MSC Com-
mand Block Wrapper)
• Provisions to share ATA bus with other hosts (e.g.,
USB/1394 dual device)
• Manufacturing interconnect test support provided with ven-
dor-specific USB commands:
— Read/Write access to relevant ASIC pins
— Manufacturing Interconnect Test Tools
• Utilizes inexpensive 30-MHz crystal for clock source.
1.1
Functional Block Diagram
CY7C68310
Control Logic
ATA Interface Logic
ROM
64 Byte
RAM
2kByte FIFO
USB HS/FS
Control Logic
EEPROM
Interface
Control
USB
2.0
Xcvr
GPIO Pins (3)
nEJECT
ATAEN
OSC
nRESET
SYSIRQ
DISKRDY
nPWR500
LOWPWR
DRVPWRVLD
VBUSPWRD
VBUSPWRVLD
SCL
SDA
VBUS
D-
D+
Figure 1-1. Block Diagram
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