8/39

The lower key priority means the trigger with lower

index has the priority to be acknowledged and

responsed when there are several triggers activated

simultaneously.

For

example:

Three

triggers

are

activated

simultaneously, RW3K1, RW2K3, RW4K2. The RW3K1

has the priority, sentence 3 will be responsed.

For another example: Five triggers are activated

simultan eously, RW1K2, RW2K3, TGA/OKY, TGB,

TGC. The RW1K2 has the priority, sentence 5 will be

responsed.

There is a priority reference on page 9/39 and a timing

diagram III to illustrate it.

First Key Priority

First key priority is available among 16 mafrix triggers.

This defines the relationship on time line for two or

more triggers overlap.

While user activating a trigger,

for example RW2K2, and its sound plays, user is

unable to activate the other trigger once RW2K2 is kept

activated regardless sentence 6 is finished or not.

It means first trigger prohibits the acknowledge of later

triggers when trigger is kept true.

Last Key Priority

Last key priority is available among three straight keys -

TGA, TGB, TGC.

This defines the relationship on time line for two or

more triggers overlap.

What will it result when a

trigger is activated while a trigger is true ahead and

kept true ?

While user already activates a trigger, for example

TGC, and keeps this TGC true, the later trigger is still

able to come in and acknowledged by chip.

It means

the late trigger is not prohibited by priorer.

See timing diagrams III.4,5,6 for reference.

User may be confused it with "retrigger".

They are

different.

Conditions

Between

Straight

Triggers

Between

Straight trigger

And Matrix trigger

Between Matrix triggers

TGm

KiRWj

Not Guaranteed

KiRWj

TGm

Not Guanranteed

Priorer

Later

Priority Result

TGm

TGn

Last key

KhRWi

KhRWj

First key

KiRWh

KjRWh

First key

KiRWm

KjRWn

First key

Key Priority Reference

Legend :

Priorer

Later

PID247*** 09/96

MSS0307/S0607/S0907/S1207/S1507/S1807

MOSEL VITELIC INC.

Specifications subject to change without notice, contact your sales representatives for the most recent information.

(Preliminary)

Application Notes

R1

Oscillation Resistor at pin Rosc, see chapter Signals

paragraph Rosc as well as DC Characteristics for

detail.

R2

Bypss Resistor at pin Cout, see chapter Signals

paragrahp Cout for detail.

R cds

Maximal contact resistance. Whenever try to activate

the input signal pin at matrix triggers, to have the cross

point contacted will activate it. However, there may be

resistance on the cross point A resistance higher than

this R cds will be unable to activate the trigger.

To apply Vdd (or Vss, depends on mask option

specified) directly to stand-alone trigger will activate the

trigger.

However, there may be resistance on the

contact point. A resistance higher than R cds will be

unable to activate the trigger, either.

To limit current runs through LED lamp

S1207 output pin provides huge drive (or sink) current

capability. But the LED lamp may not need so huge

current to have a best performance. To serial a resistor

along with LED lamp is recommended.

Don't flash LED at Cout Silence

The LED lamp flashes well in whatever options user

specified when the sound is playing. Don't flash LED

lamp

when

Cout

stays

at

mute

is

strongly

recommended.

If user insists, please be noted that there is a slight

drum stream comes out at speaker. Its frequency is

double the frequency of LED flash.

Its loudness

depends on the Vdd bias, transistor amplification and

count of LED lamp flashes. It could be -35 dB (or even

lower as -50 dB) lower than the meaningful sound

played at the office operation environment and

hand-touchable distance.