FS791/92/94
Document #: 38-07343 Rev *A
Page 2 of 9
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General Description
The Cypress FS791/2/4 are Spread Spectrum Clock Genera-
tor ICs (SSCG) designed for the purpose of reducing Electro
Magnetic Interference (EMI) found in today’s high-speed digi-
tal systems.
The FS791/2/4 SSCG clocks use an Cypress proprietary tech-
nology to modulate the input clock frequency, FSOUT, by mod-
ulating the frequency of the digital clock. By modulating the
reference clock the measured EMI at the fundamental and har-
monic frequencies of FSOUT is greatly reduced. This reduc-
tion in radiated energy can significantly reduce the cost of
complying with regulatory requirements without degrading dig-
ital waveforms.
The FS791/2/4 are designed to operate over a very wide range
of input frequencies and provide 1x, 2x, and 4x modulated
clock outputs.
The bandwidth of the frequency spread at FSOUT is deter-
mined by the values of the loop filter components. The modu-
lation rate is determined internally by the input frequency and
the selected input frequency range.
The bandwidth of these products can be programmed from as
little as 0.6% up to as much as 4.0% by selecting the proper
loop filter value. Refer to the Loop Filter Selection chart on
page 4 for recommended values. Due to a wide range of ap-
plication requirements, an external loop filter (LF) is used on
the FS79x products.
The user can select the exact amount of frequency modulation
suitable for the application. Using a fixed internal loop filter
would severely limit the use of a wide range of modulation
bandwidths (Spread%) to a few discrete values.
The Cypress FS791/2/4 Spread Spectrum Clock Generator
(SSCG) products are versatile devices to use in a wide range
of applications.
Refer to FS781/2/4 products for applications requiring a 6 to
82 MHz frequency range.
Pin Description
Pin
Name
I/O
Type
Description
1,2
Xin/Xout
I/O
analog
Pins form an on-chip reference oscillator when connected to terminals of an
external parallel resonant crystal. XIN may be connected to TTL/CMOS ex-
ternal clock other than crystal, leave XOUT (pin 2) unconnected.
3,7
S1/S0
I
CMOS/TTL
Digital control inputs used to select the input frequency range and output
frequency scaling. Refer Table 1 for selection.
S1 has internal pull-up(1) and S0 has internal pull-down(0).
4
LF
I
Analog
Loop filter. Single ended three-state output of the phase detector. A sin-
gle-pole low-pass filter is connected to the loop filter (LF).
5
VSS
P
Power
Power Supply Ground.
6
FSOUT
O
CMOS/TTL
Modulated Clock Output. The output frequency is centered on and a multiple
of the input (Xin) as follows:
FS791 = 1X; FS792 = 2X; FS794 = 4X
8
VDD
P
Power
Positive Power Supply.
Table 1. Output Frequency Selection – FSOUT SSCG (Modulated Output Clock) Product Selection
Product Number
FSOUT Frequency Scaling
Description
FS791
1X
1X Modulated Frequency of Input Clock
FS792
2X
2X Modulated Frequency of Input Clock
FS794
4X
4X Modulated Frequency of Input Clock
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