DS18B20

17 of 21

data from the DS18B20 is valid for 15

μs after the falling edge that initiated the read time slot. Therefore,

the master must release the bus and then sample the bus state within 15

μs from the start of the slot.

and by locating the master sample time during read time slots towards the end of the 15

μs period.

DETAILED MASTER READ 1 TIMING Figure 15

RECOMMENDED MASTER READ 1 TIMING Figure 16

RELATED APPLICATION NOTES

The following Application Notes can be applied to the DS18B20. These notes can be obtained from the

Maxim website at http://www.maxim-ic.com, or through our faxback service at (214) 450–0441.

Application Note 27: Understanding and Using Cyclic Redundancy Checks with Dallas Semiconductor

Touch Memory Product

Application Note 122: Using Dallas' 1-Wire ICs in 1-Cell Li-Ion Battery Packs with Low-Side N-

Channel Safety FETs Master

Application Note 126: 1-Wire Communication Through Software

Application Note 162: Interfacing the DS18X20/DS1822 1-Wire Temperature Sensor in a

Microcontroller Environment

App Note 208: Curve Fitting the Error of a Bandgap-Based Digital Temperature Sensor

App Note 2420: 1-Wire Communication with a Microchip PICmicro Microcontroller

App Note 3754: Single-Wire Serial Bus Carries Isolated Power and Data

Sample 1-Wire subroutines that can be used in conjunction with AN74 can be downloaded from the

Maxim website.

GND

1-WIRE BUS

15

μs

VIH of Master

Master samples

LINE TYPE LEGEND

Bus master pulling low

Resistor pullup

GND

1-WIRE BUS

15

μs

VIH of Master

small

small

Master samples