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EKA8564A 数据表(PDF) 14 Page - ELAN Microelectronics Corp |
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EKA8564A 数据表(HTML) 14 Page - ELAN Microelectronics Corp |
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14 / 16 page ![]() eKA8564A USB Audio Controller 10 • Product Specification (V0.1) 09.08.2006 (This specification is subject to change without further notice) 11 I 2S Interface Signal MSB -1 -2 -3 +3 +2 +1 LSB MSB -1 -2 -3 +3 +2 +1 LSB LRCLK BCLK SDATA 31 31 0 0 Left Channel Right Channel Fig 11-1 I 2S Justified Audio Stream Format MSB -1 -2 -3 +3 +2 +1 LSB MSB -1 -2 -3 +3 +2 +1 LSB LRCLK BCLK SDATA 31 31 0 0 Left Channel Right Channel Fig 11-2 Left Justified Audio Stream Format MSB -1 -2 -3 +3 +2 +1 LSB MSB -1 -2 -3 +3 +2 +1 LSB LRCLK BCLK SDATA 31 31 0 0 Left Channel Right Channel Fig 11-3 Right Justified Audio Stream Format The LRCLK and BCLK are derived from MCLK. The frequency ratio MCLK : LRCLK:BCLK = 256: 1 : 64. The frequency of LRCLK equals the sampling rate 48kHz, 44.1kHz, 32kHz or 8kHz based on FS_SEL0 and FS_SEL1 pins status. |
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