Preliminary Data Sheet #: SG040
Page 7 of 16
Rev: P01
Date: 11/13/03
© Copyright 2003 The Connor-Winfield Corp.
All Rights Reserved Specifications subject to change without notice
Pin Description
Table 6
Pin #
Pin Name
Pin Information
Note
1
ENABLE/TRI-STATE
VCXO Enable. (Enable = 0, Disable = 1 = CMOS Outputs Tri-stated)
9.0
2
TCK
No Connection, Internal Factory Programming Input.
8.0
3
TDO
No Connection, Internal Factory Programming Input.
8.0
4
REF
A
CMOS Reference Frequency Input.
5
SEL
AB
Input Reference Select Pin. (REFA = 0, REFB = 1)
9.0
6
RESET
RESET. (RESET = 1)
9.0
7
REF
B
CMOS Reference Frequency Input.
8V
ee
Ground.
9FR
status
Free Run Status. (FR = 1)
10
V
cc
Supply Voltage relative to ground.
11
N/C
No Connection. (Optional Reference Output Available)
8.0, 8.1
12
ALARM
Loss of Reference / Lock alarm. (Alarm = 1)
13
FR
Force Free Run. (Phase Lock = 0, Free Run = 1)
9.0
14
TDI
No Connection, Internal Factory Programming Input.
8.0
15
TMS
No Connection, Internal Factory Programming Input.
8.0
16
QN
LVPECL Complementary Output.
17
V
ee
Ground.
18
Q
LVPECL Output.
Circuit Board Footprint & Keepout Recommendations
Figure 6
0.8400
[21.34 mm]
1.0400
[26.42 mm]
0.8650
[21.97 mm]
0.1000
[2.54 mm]
0.0350
[0.89 mm]
0.0650
[1.65 mm]
0.1000
[2.54 mm]
Keep Out
Area
1.0700
[27.18 mm]
NOTES
8.0
Do not connect pin
8.1
Contact a Sales Representative for availibilty
and use of optional reference output
9.0
Input pulled to ground
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