STA328

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6.4.1.1Current Address Multi-byte Read

The multi-byte read modes can start from any internal address. Sequential data bytes will be read from

sequential addresses within the STA328. The master acknowledges each data byte read and then gen-

erates a STOP condition terminating the transfer.

6.4.2

Random Address Byte Read

Following the START condition the master sends a device select code with the RW bit set to 0. The

STA328 acknowledges this and then the master writes the internal address byte. After receiving, the in-

ternal byte address the STA328 again responds with an acknowledgement. The master then initiates an-

other START condition and sends the device select code with the RW bit set to 1. The STA328

acknowledges this and then responds by sending one byte of data. The master then terminates the trans-

fer by generating a STOP condition.

6.4.2.1Random Address Multi-byte Read

The multi-byte read modes could start from any internal address. Sequential data bytes will be read from

sequential addresses within the STA328. The master acknowledges each data byte read and then gen-

erates a STOP condition terminating the transfer.

6.5 Write Mode Sequence

6.6 Read Mode Sequence

DEV-ADDR

ACK

START

RW

SUB-ADDR

ACK

DATA IN

ACK

STOP

BYTE

WRITE

DEV-ADDR

ACK

START

RW

SUB-ADDR

ACK

DATA IN

ACK

STOP

MULTIBYTE

WRITE

DATA IN

ACK

DEV-ADDR

ACK

START

RW

DATA

NO ACK

STOP

CURRENT

ADDRESS

READ

DEV-ADDR

ACK

START

RW

SUB-ADDR

ACK

DEV-ADDR

ACK

STOP

RANDOM

ADDRESS

READ

DATA

NO ACK

START

RW

DEV-ADDR

ACK

START

DATA

ACK

DATA

ACK

STOP

SEQUENTIAL

CURRENT

READ

DATA

NO ACK

DEV-ADDR

ACK

START

RW

SUB-ADDR

ACK

DEV-ADDR

ACK

SEQUENTIAL

RANDOM

READ

DATA

ACK

START

RW

DATA

ACK

NO ACK

STOP

DATA

RW=

HIGH