| 数据搜索系统,热门电子元器件搜索 |
|
LM2903D 数据表(PDF) 3 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
LM2903D 数据表(HTML) 3 Page - STMicroelectronics |
|
3 / 9 page ![]() LM2903 3/9 ELECTRICAL CHARACTERISTICS VCC + = 5V, V cc - = GND, T amb = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit VIO Input Offset Voltage 1) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax. 1. At output switch point, VO ≈ 1.4V, RS = 0Ω with VCC + from 5V to 30V, and over the full input common-mode range (0V to V CC + –1.5V). 17 15 mV IIO Input Offset Current Tamb = +25°C Tmin ≤ Tamb ≤ Tmax. 550 150 nA IIB Input Bias Current 2) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax. 2. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output, so no loading charge exists on the reference of input lines 25 250 400 nA AVD Large Signal Voltage Gain (Vcc = 15V,RL=15kΩ, Vo=1 to 11V) 25 200 V/mV ICC Supply Current (all comparators) VCC = 5V, no load VCC = 30V, no load 0.4 1 1 2.5 mA VICM Input Common Mode Voltage Range (Vcc= 30V) 3) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax. 3. The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of the common-mode voltage range is VCC + –1.5V, but either or both inputs can go to +30V without damage. 0 0 VCC +-1.5 VCC +-2 V VID Differential Input Voltage 4) 4. Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than –0.3V (or 0.3V below the negative power supply, if used) VCC + V VOL Low Level Output Voltage (Vid = -1V, Isink = 4mA) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 250 400 700 mV IOH High Level Output Current (VCC =Vo =30V, Vid = 1V) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 0.1 1 nA µA ISINK Output Sink Current (Vid = -1V,Vo = 1.5V) 616 m Α tRE Small Signal Response Time 5) (RL = 5.1kΩ to VCC +) 5. The response time specified is for a 100mV input step with 5mV overdrive. 1.3 µs tREL Large Signal Response Time 6) TTL Input (Vref = +1.4 V, RL=5.1kΩ to VCC +) Output Signal at 50% of final value Output Signal at 95 % of final value 6. Maximum values are guaranteed by design & evaluation. 500 1 ns µs |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |