LNBH24

LNBH24 software description

17/30

X = don't care

All values are typical unless otherwise specified

Valid with TTX pin floating or connected GND

7.4

Diagnostic received data (I²C read mode) for both sections

A/B

The LNBH24 can provide to the master a copy of the diagnostic system register information

via I²C bus in read mode. The read mode is master activated by sending the chip address

with R/W bit set to 1. At the following master generated clock bits, the LNBH24 issues a byte

on the SDA data bus line (MSB transmitted first). At the ninth clock bit the MCU master can:

●

Acknowledge the reception, thus starting the transmission of another byte from the

LNBH24

●

No acknowledge, stopping the read mode communication

Three bits of the register are read back as a copy of the corresponding write output voltage

register status (LLC, VSEL, EN), while the other five bits convey diagnostic information

about the over-temperature (OTF), output voltage level (VMON), output overload (OLF),

minimum output current presence (IMON) and 22 kHz tone (TMON). In normal operation the

diagnostic bits are set to zero, while if a failure is occurring, the corresponding bit is set to

one. At start-up all the bits are reset to zero.

Table 6.

Truth table

PCL

TTX

TEN

LLC

VSEL

EN

ITEST

AUX

Function

00

0

1

0

00

1

1

0

01

0

1

0

01

1

1

0

XX

1

X

1

0

1

22 KHz controlled by DSQIN pin (only if TTX=1)

1

1

1

22 KHz tone output is always activated

01

11

0

1

Pulsed (dynamic) current limiting is selected

1

1

Static current limiting is selected

X

X

1

0

Minimum output current diagnostic threshold = 6mA typ.

X

X

1

1

Minimum output current diagnostic threshold = 12mA typ.

X

X

X

X

X

0

X

X

Power block disabled