M95512-R datasheet(11/39 Pages) STMICROELECTRONICS

11 / 39 page

M95512-W, M95512-R

Connecting to the SPI bus

11/39

The typical value of R is 100 k

Ω, assuming that the time constant R*C

p (Cp = parasitic

capacitance of the bus line) is short enough, as the S and C lines must reach the correct

state (S = High and C = Low) while the SPI bus is in high impedance.

Example: Cp = 50 pF, that is R*Cp = 5 µs <=> the application must ensure that the Bus

Master never leaves the SPI bus in the high impedance state for a time period shorter than

5µs.

3.1

SPI modes

These devices can be driven by a microcontroller with its SPI peripheral running in either of

the two following modes:

●

CPOL=0, CPHA=0

●

CPOL=1, CPHA=1

For these two modes, input data is latched in on the rising edge of Serial Clock (C), and

output data is available from the falling edge of Serial Clock (C).

The difference between the two modes, as shown in Figure 4, is the clock polarity when the

bus master is in Stand-by mode and not transferring data:

●

C remains at 0 for (CPOL=0, CPHA=0)

●

C remains at 1 for (CPOL=1, CPHA=1)

Figure 4.

SPI modes supported

AI01438B

MSB

CPHA

CPOL

MSB

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