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M45PE16-VMP6TP 数据表(PDF) 21 Page - Numonyx B.V

部件名 M45PE16-VMP6TP
功能描述  16 Mbit, low-voltage, Page-Erasable Serial Flash memory with byte alterability and a 50 MHz SPI bus interface
PDF  45 Pages
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制造商  NUMONYX [Numonyx B.V]
网页  http://www.numonyx.com
标志 NUMONYX - Numonyx B.V

M45PE16-VMP6TP 数据表(HTML) 21 Page - Numonyx B.V

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M45PE16
Instructions
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6.4
Read Status Register (RDSR)
The Read Status Register (RDSR) instruction allows the Status Register to be read. The
Status Register may be read at any time, even while a Program, Erase or Write cycle is in
progress. When one of these cycles is in progress, it is recommended to check the Write In
Progress (WIP) bit before sending a new instruction to the device. It is also possible to read
the Status Register continuously, as shown in Figure 9.
The status bits of the Status Register are as follows:
6.4.1
WIP bit
The Write In Progress (WIP) bit indicates whether the memory is busy with a Write, Program
or Erase cycle. When set to 1, such a cycle is in progress, when reset to 0 no such cycle is
in progress.
6.4.2
WEL bit
The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch.
When set to 1 the internal Write Enable Latch is set, when set to 0 the internal Write Enable
Latch is reset and no Write, Program or Erase instruction is accepted.
Figure 9.
Read Status Register (RDSR) instruction sequence and data-out
sequence
Table 5.
Status Register Format
b7
b0
0
0
0
0
0
0
WEL(1)
1.
WEL and WIP are volatile read-only bits (WEL is set and reset by specific instructions; WIP is automatically
set and reset by the internal logic of the device).
WIP(1)
C
D
S
2
1
3456789 10 11 12 13 14 15
Instruction
0
AI02031E
Q
7
6543210
Status Register Out
High Impedance
MSB
7
6543210
Status Register Out
MSB
7



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