MPC8245 datasheet(2/68 Pages) FREESCALE

2 / 68 page

MPC8245 Integrated Processor Hardware Specifications, Rev. 10

Freescale Semiconductor

Overview

Figure 1. MPC8245 Block Diagram

Peripheral Logic Bus

Instruction Unit

System

Integer

Load/Store

Floating-

Data

Instruction

16-Kbyte

Processor Core Block

Processor

PLL

(64-Bit) Two-Instruction Fetch

(64-Bit) Two-Instruction Dispatch

64-Bit

Branch

Processing

Unit

(BPU)

MPC8245

Unit

(SRU)

Unit

(IU)

Unit

(LSU)

Point

Unit

(FPU)

Data

Cache

Instruction

Cache

MMU

Additional Features:

• Prog I/O with Watchpoint

• JTAG/COP Interface

• Power Management

Address

Translator

DLL

Fanout

Buffers

PCI

Arbiter

Message

Unit

(with I2O)

I2C

Controller

DMA

Controller

Interrupt

Controller/

PIC

Timers

PCI Bus

Interface Unit

Memory

Controller

Data Path

ECC Controller

Central

Control

Unit

32-Bit

OSC_IN

Five

Request/Grant Pairs

I2C

5 IRQs/

Peripheral Logic Block

Peripheral Logic

PLL

PCI Bus

Data (64-Bit)

Address

Data Bus

(32- or 64-Bit)

Memory/ROM/

PortX Control/Address

PCI Interface

Clocks

16 Serial

Interrupts

Configuration

Registers

(32-Bit)

with 8-Bit Parity

or ECC

PCI_SYNC_IN

SDRAM_SYNC_IN

Watchpoint

Facility

DUART

Performance

Monitor

SDRAM Clocks

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