AI00760B

n= 0

Last

Addr

VERIFY

E = 100

µs Pulse

++n

=25

++ Addr

VCC = 6.25V, VPP = 12.75V

FAIL

CHECK ALL BYTES

1st: VCC =6V

2nd: VCC = 4.2V

YES

NO

YES

NO

YES

NO

Figure 7. Programming Flowchart

PRESTO II Programming Algorithm

PRESTO II Programming Algorithm allows the

whole array to be programmed with a guaranteed

margin, in a typical time of 52.5 seconds.Program-

ming with PRESTO II consists of applying a se-

quence of 100

µs programpulses to each byte until

a correct verify occurs (see Figure 7). During pro-

gramming and verify operation, a MARGIN MODE

circuit is automaticallyactivated in order to guaran-

tee that each cell is programmed with enough

margin. No overprogram pulse is applied since the

verify in MARGIN MODE provides the necessary

margin to each programmed cell.

Program Inhibit

Programming of multiple M27C405s in parallel with

different data is also easily accomplished. Except

for E, all like inputs including G of the parallel

M27C405 may be common. A TTL low level pulse

will program that M27C405. A high level E input

inhibits the other M27C405s from being pro-

grammed.

Program Verify

A verify (read) should be performed on the pro-

grammed bits to determine that they were correctly

programmed. The verify is accomplished with G at

On-Board Programming

Programming the M27C405 may be performed

directly in the application circuit, however this re-

quires modification to the PRESTO II Algorithm

determined by the user and normally is compatible

with other components using the same supply volt-

age. It is recommended that the maximum value of

used.

does not affect the programming, it gives a higher

test capability in VERIFY mode.

enable the programming.

AI01349

n= 0

Last

Addr

VERIFY

?

E= 10

µs Pulse

++n

=25

++ Addr

VPP = 12.75V

FAIL

CHECK ALL BYTES

VPP =VCC

YES

NO

YES

NO

YES

NO

SET MARGIN MODE

E= 10

µs Pulse

Figure 8. On-Board Programming Flowchart

9/15

M27C405