M27C2001

2/16

Figure 2B. LCC Pin Connections

AI00718

A8

A10

17

A1

A0

Q0

A7

A4

A3

A2

A6

A5

9

A9

1

A11

A13

Q7

32

M27C2001

A14

G

E

25

Figure 2A. DIP Pin Connections

A1

A0

Q0

A7

A4

A3

A2

A6

A5

A13

A10

A8

A9

Q7

A14

A11

G

E

Q5

Q1

Q2

Q3

VSS

Q4

Q6

A17

P

A16

A12

VPP

VCC

A15

AI00717

M27C2001

8

1

2

3

4

5

6

7

9

10

11

12

13

14

15

16

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

The operationg modes of the M27C2001 are listed

in the Operating Modes table. A single power sup-

ply is required in the read mode. All inputs are TTL

Signature.

Read Mode

The M27C2001 has two control functions, both of

which must be logically active in order to obtain

data at the outputs. Chip Enable (E) is the power

control and should be used for device selection.

Output Enable (G) is the output control and should

be used to gate data to the output pins, indepen-

dent of device selection. Assuming that the ad-

dresses are stable, the address access time

E has been low and the addresses have been sta-

Standby Mode

The M27C2001 has a standby mode which reduc-

es the supply current from 30mA to 100

µA. The

M27C2001 is placed in the standby mode by ap-

plying a CMOS high signal to the E input. When in

the standby mode, the outputs are in a high imped-

ance state, independent of the G input.

Figure 2C. TSOP Pin Connections

A1

A0

Q0

A7

A4

A3

A2

A6

A5

A13

A10

A8

A9

Q7

A14

A11

G

E

Q5

Q1

Q2

Q3

Q4

Q6

A17

P

A16

A12

VPP

VCC

A15

AI01153B

M27C2001

(Normal)

8

1

9

16

17

24

25

32

VSS