M494B1 datasheet(5/22 Pages) STMICROELECTRONICS

5 / 22 page

1 =RC

2 =Ri . C

1.5V

Figure 3

FUNCTIONAL DESCRIPTION (continued)

Several tests are performed on the signal :

a) Measurement of the pulse distance T (time

base synchronization).

b) Check of the bit positions relative to the time

base windows.

Check of the parity bit.

d) Check of the absence of pulses between parity

and stop pulses.

e) Check of the noise level. The receiver checks

the noise level for a time T after each pulse

detected.

If all these tests are successful the received word

is stored and decoded. If not it is rejected. The

transmission is terminated on reception of the end

of transmission (EOT) code or if the internal timer

measures a transmission interruption of more than

550ms. For more detail concerning the operation

of the RC receiver refer to SGS-THOMSON Tech-

nical Note No. 155 pp11-12.

The RC receiver and the local keyboard have the

same command source priority i.e. a local com-

mand is not accepted until a previously accepted

RC command has been completely executed and

the EOT code transmitted. Similarly if a local com-

mand is under execution then an RC command will

not be accepted. The RC truth table and com-

mands are shown on the next page.

Analog Control Outputs

Four analog control outputs are implemented to

provide for Volume, Brightness, Saturation and

Contrast from four 6 bit D/A’s. These D/A’s use the

Pulse Width Modulation technique to synthesize a

pulse train of constant frequency but variable pulse

width (PWM). Each output delivers a 7.8kHz

square wave whose duty cycle is variable in 63

steps. External RC filtering and level shifting is

required to realise a static DC voltage from the

pulse train. If the analog outputs are continuously

varied by command from the keyboard or data

command sources the outputs will change approx.

every 112ms (fck = 500kHz) or approx. every

102ms if the command is issued from the RC

command source. One analog control is specifi-

cally designed asa volume control as mute circuitry

is built in.

On start up reset the analog control outputs except

volume are enabled after a period of approx.

1.1 seconds. In the Standby and Off states all the

analog control outputs are pulled to logic LO.

The normalise command reads the contents of

each analog memory sequentially to its corre-

sponding counter and D/A output.

Tuning Output

The tuning voltage is generated from a 13 bit

counter. The program memory stores the 12 MSB’s

of the tuning word. The range of the AFC circuitry

is at least 3 bits so the LSB of the tuning counter

does not affect the resolution of tuning.

The contents of the counter are converted using a

PWM and a Bit Rate Multiplier (BRM) technique.

13 bits gives 8192 steps which yields a resolution

of approximately 3.9mV with a max. tuning voltage

of 32V. This corresponds to a resolution of about

75kHz in the UHF band. The 5 MSB’s of the tuning

word are converted using PWM and the remaining

8 bits using BRM. Thus as the tuning word in-

creases from all zeroes the number of pulsesin one

period increases to 256 with all the pulses being

the same length (to =2

µs). For values larger then

256 PWM conversion takes place where the num-

ber of pulses in one period stays constant at 256

but the width changes.

When the pulse width reaches 15to two successive

pulses ”link” together and the number of pulses

decreases (see Figure 4).

The pulse train is fed to an external low pass filter

to realise a DC voltage. The temperature depend-

ence of this system is predominantly the switching

times of the output pulses and as there are only a

maximum of 256 pulses in one period the tempera-

ture stability is very good.

In Standby and Off states the tuning output is pulled

to logic LO.

256

No OF PULSES

TUNING

VOLTAGE

31V

Figure 4

M494

5/22

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