Rev.01

7

EP3003

OPERATION

The EP3003 uses current mode architecture with frequency set at 1.5MHz and can be synchronized to

an external oscillator. Both channels share the same clock and run in-phase. To suit a variety of

applications, the selectable Mode pin allows the user to trade-off noise for efficiency.

Output voltage is set by an external divider returned to the VFB pins. An error amplifier compares the

divided output voltage with a reference voltage of 0.6V and adjusts the peak inductor current accordingly.

Over voltage and under voltage comparators will pull the POR output low if the output voltage is not

within ±8.5%. The POR output will go high after 270K clock cycles of achieving regulation. During normal

operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle when

the VFB voltage is below the reference voltage.

The current into the inductor and the load increases until the current limit is reached. The switch turns off

and energy stored in the inductor flows through the bottom switch (N-channel MOSFET) into the load

until the next clock cycle.

The peak inductor current is controlled by the internally compensated ITH voltage, which is the output of

the error amplifier. This amplifier compares the VFB pin to the 0.6V reference. When the load current

amplifier to increase the ITH voltage until the average inductor current matches the new load current.

The main control loop is shut down by pulling the RUN pin to ground.

Low Current Control

Two modes are available to control the operation of the EP3003 at low currents. Both modes

automatically switch from continuous operation to the selected mode when the load current is low.

To optimize efficiency, the Burst Mode operation can be selected. When the load is relatively light, the

EP3003 automatically switches into Burst Mode operation in which the PMOS switch operates

intermittently based on load demand with a fixed peak inductor current. By running cycles periodically,

the switching losses which are dominated by the gate charge losses of the power MOSFETs are

minimized. The main control loop is interrupted when the output voltage reaches the desired regulated

value. A hysteretic voltage comparator trips when ITH is below 0.35V, shutting off the switch and

reducing the power. The output capacitor and the inductor supply the power to the load until ITH exceeds

0.65V, turning on the switch and the main control loop which starts another cycle.

For lower ripple noise at low currents, the pulse skipping mode can be used. In this mode, the EP3003

continues to switch at a constant frequency down to very low currents, where it will begin skipping pulses.