74HC4053_90 datasheet(2/17 Pages) PHILIPS

2 / 17 page

December 1990

Philips Semiconductors

Product speciﬁcation

Triple 2-channel analog

multiplexer/demultiplexer

74HC/HCT4053

FEATURES

• Low “ON” resistance:

Ω (typ.) at VCC − VEE = 4.5 V

Ω (typ.) at VCC − VEE = 6.0 V

Ω (typ.) at VCC − VEE = 9.0 V

• Logic level translation:

to enable 5 V logic to communicate

with

± 5 V analog signals

• Typical “break before make” built in

• Output capability: non-standard

• ICC category: MSI

GENERAL DESCRIPTION

The 74HC/HCT4053 are high-speed Si-gate CMOS

devices and are pin compatible with the “4053” of the

“4000B” series. They are specified in compliance with

JEDEC standard no. 7A.

The 74HC/HCT4053 are triple 2-channel analog

multiplexers/demultiplexers with a common enable input

(E). Each multiplexer/demultiplexer has two independent

inputs/outputs (nY0 and nY1), a common input/output (nZ)

and three digital select inputs (S1 to S3).

With E LOW, one of the two switches is selected (low

impedance ON-state) by S1 to S3. With E HIGH, all

switches are in the high impedance OFF-state,

independent of S1 to S3.

VCC and GND are the supply voltage pins for the digital

control inputs (S1, to S3, and E). The VCC to GND ranges

are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The

analog inputs/outputs (nY0 and nY1, and nZ) can swing

between VCC as a positive limit and VEE as a negative limit.

VCC − VEE may not exceed 10.0 V.

For operation as a digital multiplexer/demultiplexer, VEE is

connected to GND (typically ground).

QUICK REFERENCE DATA

VEE = GND = 0 V; Tamb =25 °C; tr =tf = 6 ns

Notes

1. CPD is used to determine the dynamic power dissipation (PD in µW):

PD =CPD × VCC2 × fi+∑ {(CL+CS) × VCC2 × fo} where:

fi = input frequency in MHz; fo = output frequency in MHz

∑ {(CL+CS) × VCC2 × fo} = sum of outputs

CL = output load capacitance in pF; CS = max. switch capacitance in pF

VCC = supply voltage in V

2. For HC the condition is VI = GND to VCC

For HCT the condition is VI = GND to VCC − 1.5 V

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

HCT

tPZH/ tPZL

turn “ON” time

CL = 15 pF; RL =1 kΩ; VCC =5 V

E to VOS

Sn to VOS

tPHZ/ tPLZ

turn “OFF” time

E to VOS

Sn to VOS

input capacitance

3.5

CPD

power dissipation capacitance per switch notes 1 and 2

max. switch capacitance

independent (Y)

common

(Z)

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