M29F080A datasheet(2/21 Pages) STMICROELECTRONICS

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M29F080A

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Figure 2. TSOP Connections

DQ1

DQ2

A10

A14

A17

A18

DQ7

A13

A19

DQ5

DQ3

VSS

VCC

DQ4

DQ6

A12

A11

VCC

AI00520B

M29F080A

A15

A16

VSS

DQ0

Figure 3. SO Connections

A17

A18

A19

A16

DQ6

DQ2

VSS

VCC

VSS

DQ4

A13

VCC

A10

AI00521B

M29F080A

DQ0

DQ1

DQ7

A15

A14

DQ3

DQ5

A11

A12

Table 1. Signal Names

A0-A19

Address Inputs

DQ0-DQ7

Data Inputs/Outputs

Chip Enable

Output Enable

Write Enable

Reset/Block Temporary Unprotect

Ready/Busy Output

VCC

Supply Voltage

VSS

Ground

Not Connected Internally

SUMMARY DESCRIPTION

The M29F080A is an 8 Mbit (1Mb x8) non-volatile

memory that can be read, erased and repro-

grammed. These operations can be performed us-

ing a single 5V supply. On power-up the memory

defaults to its Read mode where it can be read in

the same way as a ROM or EPROM.

The memory is divided into blocks that can be

erased independently so it is possible to preserve

valid data while old data is erased. Blocks can be

protected in groups to prevent accidental Program

or Erase commands from modifying the memory.

Program and Erase commands are written to the

Command Interface of the memory. An on-chip

Program/Erase Controller simplifies the process of

programming or erasing the memory by taking

care of all of the special operations that are re-

quired to update the memory contents. The end of

a program or erase operation can be detected and

any error conditions identified. The command set

required to control the memory is consistent with

JEDEC standards.

Chip Enable, Output Enable and Write Enable sig-

nals control the bus operation of the memory.

They allow simple connection to most micropro-

cessors, often without additional logic.

The memory is offered in a TSOP40 (10 x 20mm)

and SO44 packages and it is supplied with all the

bits erased (set to ’1’).

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