Operation descriptions

VIPER17

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Figure 29. FB pin configuration

7.11

Burst-mode operation at no load or very light load

power MOSFET is not more allowed to be switched on. It can be switched on again if the

internal input, connected to feedback pin through a resistive voltage divider, is lower

clamped to a certain value leading to a minimum value, of 90 mA (typ.) for the drain peak

current.

When the load decrease the feedback loop reacts lowering the feedback pin voltage. As the

result of the feedback reaction to the energy delivery stop, the feedback pin voltage

Figure 30

shows this behavior called burst mode. Systems alternates period of time where

power MOSFET is switching to period of time where power MOSFET is not switching. The

power delivered to output during switching periods exceeds the load power demands; the

excess of power is balanced from not switching period where no power is processed. The

advantage of burst mode operation is an average switching frequency much lower then the

normal operation working frequency, up to some hundred of hertz, minimizing all frequency

related losses.

4.8V

From sense FET

PWM

CONTROL

+

-

PWM

BURST

To disable logic

+

-

OLP comparator

To PWM Logic

BURST-MODE

LOGIC

Cfb1

Rfb1

Cfb

BURST-MODE

REFERENCES