9/30

M29W008AT, M29W008AB

Note: 1. Commands not interpreted in this table will default to read array mode.

operation (see Tables 15, 16 and Figure 9).

3. X = Don’t Care.

4. The first cycles of the RD or AS instructions are followed by read operations. Any number of read cycles can occur after the com-

mand cycles.

code.

7. For Coded cycles address inputs A15-A19 are don’t care.

8. Optional, additional Blocks addresses must be entered within the erase timeout delay after last write entry, timeout statuscan be

verified through DQ3 value (see Erase Timer Bit DQ3 description). When full command is entered, read Data Polling or Toggle bit

until Erase is completed or suspended.

9. Read Data Polling, Toggle bits or RB until Erase completes.

10. During Erase Suspend, Read and Data Program functions are allowed in blocks not being erased.

Mne.

Instr.

Cyc.

1st Cyc.

2nd Cyc.

3rd Cyc.

4th Cyc.

5th Cyc.

6th Cyc.

7th Cyc.

Read/Reset

Memory Array

1+

X

Read Memory Array until a new write cycle is initiated.

Data

F0h

3+

555h

2AAh

555h

Read Memory Array until a new write cycle is

initiated.

Data

AAh

55h

F0h

Auto Select

3+

555h

2AAh

555h

Read Electronic Signature or Block Protection

Status until a new write cycle is initiated. See Note 5

and 6.

Data

AAh

55h

90h

PG

Program

4

555h

2AAh

555h

Program

Address

Read Data Polling or Toggle Bit until

Program completes.

Data

AAh

55h

A0h

Program

Data

BE

Block Erase

6

555h

2AAh

555h

555h

2AAh

Block

Address

Additional

Data

AAh

55h

80h

AAh

55h

30h

30h

CE

Chip Erase

6

555h

2AAh

555h

555h

2AAh

555h

Note 9

Data

AAh

55h

80h

AAh

55h

10h

Erase Suspend

1

X

Read until Toggle stops, then read all the data needed from any Block(s) not

being erased then Resume Erase.

Data

B0h

ER

Erase Resume

1

X

Read Data Polling or Toggle Bits until Erase completes or Erase is suspended

another time.

Data

30h