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M29W004 数据表(PDF) 2 Page - STMicroelectronics |
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M29W004 数据表(HTML) 2 Page - STMicroelectronics |
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2 / 20 page ![]() M29W004BT, M29W004BB 2/20 Figure 2. TSOP Connections VSS DQ1 DQ2 A7 A1 E A4 A3 A11 A17 A14 A15 DQ7 A9 A16 G NC DQ5 DQ3 NC VCC DQ4 DQ6 A8 W RB A18 NC RP AI02950 M29W004BT M29W004BB 10 1 11 20 21 30 31 40 A0 A12 A13 NC A10 A5 A6 VCC DQ0 VSS A2 Table 1. Signal Names A0-A18 Address Inputs DQ0-DQ7 Data Inputs/Outputs E Chip Enable G Output Enable W Write Enable RP Reset/Block Temporary Unprotect RB Ready/Busy Output VCC Supply Voltage VSS Ground NC Not Connected Internally be protected independently to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are writ- ten to the Command Interface of the memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. The blocks in the memory are asymmetrically ar- ranged, see Tables 3 and 4, Block Addresses. The first or last 64 Kbytes have been divided into four additional blocks. The 16 Kbyte Boot Block can be used for small initialization code to start the micro- processor, the two 8 Kbyte Parameter Blocks can be used for parameter storage and the remaining 32 Kbyte is a small Main Block where the applica- tion may be stored. Chip Enable, Output Enable and Write Enable sig- nals control the bus operation of the memory. They allow simple connection to most micropro- cessors, often without additional logic. The memory is offered in a TSOP40 (10 x 20mm) package and it is supplied with all the bits erased (set to ’1’). SUMMARY DESCRIPTION The M29W004B is a 4 Mbit (512Kb x8) non-vola- tile memory that can be read, erased and repro- grammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM. The M29W004B is fully backward com- patible with the M29W004. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Each block can |
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