M34C02 datasheet(4/19 Pages) STMICROELECTRONICS

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M34C02

4/19

Start Condition

START is identified by a high to low transition of

the SDA line while the clock, SCL, is stable in the

high state. A START condition must precede any

data transfer command. The memory device

continuously

monitors

(except

during

programming cycle) the SDA and SCL lines for a

START condition, and will not respond unless one

is given.

Stop Condition

STOP is identified by a low to high transition of the

SDA line while the clock SCL is stable in the high

state.

STOP

condition

terminates

communication between the memory device and

the bus master. A STOP condition at the end of a

Read command, provided that it is followed by a

NoAck, forces the memory device into its standby

state. A STOP condition at the end of a Write

Figure 4. I2C Bus Protocol

SCL

SDA

SCL

SDA

START

CONDITION

SDA

INPUT

SDA

CHANGE

AI00792

STOP

CONDITION

MSB

ACK

START

CONDITION

SCL

MSB

ACK

STOP

CONDITION

Table 3. Device Select Code 1

Note: 1. The most significant bit (b7) is sent first.

Device Type Identifier

Chip Enable

Memory Area Select Code (two arrays)

Protection Register Select Code

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