M41ST85WMH datasheet(22/34 Pages) STMICROELECTRONICS

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M41ST85Y, M41ST85W

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trec Bit

Bit D7 of Clock Register 04h contains the trec Bit

(TR). trec refers to the automatic continuation of

the deselect time after VCC reaches VPFD. This al-

lows for a voltage settling time before WRITEs

may again be performed to the device after a pow-

er-down condition. The trec Bit will allow the user to

set the length of this deselect time as defined by

Table 6., page 22.

Initial Power-on Defaults

Upon initial application of power to the device, the

following register bits are set to a '0' state: Watch-

dog Register, FT, AFE, ABE, SQWE, and TR. The

following bits are set to a '1' state: ST, OUT, and

HT (see Table 7., page 22).

Table 6. trec Definitions

Note: 1. Default Setting

Table 7. Default Values

Note: 1. WDS, BMB0-BMB4, RB0, RB1.

2. State of other control bits undefined.

3. UC = Unchanged

trec Bit (TR)

STOP Bit (ST)

trec Time

Units

Min

Max

200(1)

2000

µs

Condition

Out

AFE

ABE

SQWE

WATCHDOG

Initial Power-up(2)

1100

Subsequent Power-up (with

battery back-up)(3)

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