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NOT FOR NEW DESIGN

May 1999

This is information on a product still in production but not recommended for new designs.

M36W108T

M36W108B

8 Mbit (1Mb x8, Boot Block) Flash Memory and

1 Mbit (128Kb x8) SRAM Low Voltage Multi-Memory Product

s

M36W108T and M36W108B are replaced

respectively by the M36W108AT and

M36W108AB

s

SUPPLY VOLTAGE

Erase and Read

s

ACCESS TIME: 100ns

s

LOW POWER CONSUMPTION

– Read: 40mA max. (SRAM chip)

– Stand-by: 30µA max. (SRAM chip)

– Read: 10mA max. (Flash chip)

– Stand-by: 100µA max. (Flash chip)

FLASH MEMORY

s

8 Mbit (1Mb x 8) BOOT BLOCK ERASE

s

PROGRAMMING TIME: 10µs typical

s

PROGRAM/ERASE CONTROLLER (P/E.C.)

– Program Byte-by-Byte

– Status Register bits and Ready/Busy Output

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MEMORY BLOCKS

– Boot Block (Top or Bottom location)

– Parameter and Main Blocks

s

BLOCK, MULTI-BLOCK and CHIP ERASE

s

ERASE SUSPEND and RESUME MODES

– Read and Program another Block during

Erase Suspend

s

100,000 PROGRAM/ERASE CYCLES per

BLOCK

s

ELECTRONIC SIGNATURE

– Manufacturer Code: 20h

– Device Code, M36W108T: D2h

– Device Code, M36W108B: DCh

SRAM

s

1 Mbit (128Kb x 8)

s

POWER DOWN FEATURES USING TWO

CHIP ENABLE INPUTS

s

BGA

LGA

LBGA48 (ZM)

6 x 8 solder balls

LGA48 (ZN)

6 x 8 solder lands

Figure 1. Logic Diagram

AI02509

20

A0-A19

W

DQ0-DQ7

VCCF

M36W108T

M36W108B

EF

VSS

8

G

RP

RB

VCCS

E1S

E2S