M48Z32V

4/16

Figure 4. Block Diagram

OPERATING MODES

The M48Z32V also has its own Power-fail Detect

circuit. The control circuitry constantly monitors

the single power supply for an out of tolerance

write protects the SRAM, providing a high degree

of data security in the midst of unpredictable sys-

nects the battery which maintains data until valid

power returns.

Table 2. Operating Modes

Note: 1. See Table 10., page 12 for details.

AI04788

LITHIUM

CELL

VPFD

VCC

VSS

VOLTAGE SENSE

AND

SWITCHING

CIRCUITRY

32K x 8

SRAM ARRAY

A0-A14

DQ0-DQ7

E

W

G

POWER

USER

SUPPLIED

Mode

E

G

W

DQ0-DQ7

Power

Deselect

3.0 to 3.6V

X

X

High Z

Standby

WRITE

X

Active

READ

Active

READ

High Z

Active

Deselect

(1)

X

X

X

High Z

CMOS Standby

Deselect

X

X

X

High Z

Battery Back-up Mode