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CHENGPIN
CP8056
P.21/
CP8056
TABLE 2.1: Reset Conditions for All Registers
Register
Address
Power-on Reset
Brown-out Reset
RSTB Reset
WDT Reset
ACC
N/A
xxxx xxxx
uuuu uuuu
OPTION
N/A
-011 1111
-011 1111
IOSTA
N/A
---- 1111
---- 1111
IOSTB
N/A
1111 1111
1111 1111
INDF
00h
xxxx xxxx
uuuu uuuu
TMR0
01h
xxxx xxxx
uuuu uuuu
PCL
02h
1111 1111
1111 1111
STATUS
03h
0001 1xxx
000# #uuu
FSR
04h
11xx xxxx
11uu uuuu
PORTA
05h
---- xxxx
---- uuuu
PORTB
06h
xxxx xxxx
uuuu uuuu
General Purpose Register
07h
xxxx xxxx
uuuu uuuu
PCON
08h
1010 ----
1010 ----
WUCON
09h
0000 0000
0000 0000
PCHBUF
0Ah
54: ---- ---0
56: ---- --00
54: ---- ---0
56: ---- --00
PDCON
0Bh
1111 1111
1111 1111
ODCON
0Ch
0000 0000
0000 0000
PHCON
0Dh
1111 1111
1111 1111
INTEN
0Eh
0--- -000
0--- -000
INTFLAG
0Fh
---- -000
---- -000
General Purpose Registers
10 ~ 3Fh
xxxx xxxx
uuuu uuuu
Legend: u = unchanged, x = unknown, - = unimplemented,
# = refer to the following table for possible values.
TABLE 2.2: TO / PD Status after Reset
TO
PD
RESET was caused by
1
1
Power-on Reset
1
1
Brown-out reset
u
u
RSTB Reset during normal operation
1
0
RSTB Reset during SLEEP
0
1
WDT Reset during normal operation
0
0
WDT Reset during SLEEP
Legend: u = unchanged
TABLE 2.3: Events Affecting TO / PD Status Bits
Event
TO
PD
Power-on
1
1
WDT Time-Out
0
u
SLEEP instruction
1
0
CLRWDT instruction
1
1
Legend: u = unchanged
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