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Feb - 01
0
0.1
1
0.8
0.6
0.4
0.2
0
0.2 0.3 0.4
0.5 0.6 0.7 0.8
P (W)
IT(AV)(A)
α = 30 º
α = 60 º
α = 90 º
α = 120 º
α = 180 º
DC
α
360 º
Fig. 1: Maximum average power dissipation
versus average on-state current
0
20
1
0.8
0.6
0.4
0.2
0
40
60
80
100 120 140
P (W)
Fig. 2: Correlation between maximum
average power dissipation and maximum
allowable temperature (Tamb and T lead).
T lead (ºC)
-45
-65
-85
-105
-125
Tamb (ºC)
Rth (j-a)
Rth (j-l)
1
0.8
0.6
0.4
0.2
0
I T(AV) (A)
Fig. 3: Average on-state current versus lead
temperature
0
20
40
60
80
100 120 140
DC
α = 180 º
T lead (ºC)
10.0
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
Igt (Tj)
Fig. 5: Relative variation of gate trigger current
and holding current versus junction temperature.
-40 -20
0
60
80 100 120 140
Igt (Tj = 25 ºC)
Ih (Tj)
Ih (Tj = 25 ºC)
40
20
Ih
Tj (ºC)
Igt
1
10
100
1,000
Fig. 6: Non repetitive surge peak on-state
current versus number of cycles.
8
7
6
5
4
3
2
1
0
I TSM (A)
Tj initial = 25 ºC
Number of cycles
1.00
0.10
0.01
Zth(j-a) / Rth(j-a)
Fig. 4: Relative variation of thermal impedance
junction to ambient versus pulse duration.
1E-3
1E-2
1E-1
1E+0
1E+1
1E+2 5E+2
tp (s)
FS01...A/B
SENSITIVE GATE SCR
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