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AM261...ZCZ 数据表(PDF) 65 Page - Texas Instruments

部件名 AM261...ZCZ
功能描述  AM261x Sitara™ Microcontrollers
PDF  218 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

AM261...ZCZ 数据表(HTML) 65 Page - Texas Instruments

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5.3.11 GPMC0
Table 5-32. GPMC0 Signal Descriptions
Signal Name [1]
Pin
Type
[2]
Description [3]
ZCZ PIN [4]
ZFG PIN [4]
ZEJ PIN [4]
ZNC PIN [4]
GPMC0_ADVn_ALE
O
GPMC Address Valid (active low) or
Address Latch Enable
A8
A10
C9
B9
GPMC0_CLK (1)
IO
GPMC Clock
L3
T3
M1
L2
GPMC0_CLKLB (2)
IO
GPMC Clock Loopback
B15
A18
B16
A17
GPMC0_DIR
O
GPMC Data Bus Signal Direction
Control
B10
D10
A9
GPMC0_OEn_REn
O
GPMC Output Enable (active low) or
Read Enable (active low)
A10, B14, C8 A12, A16, A9 A8, B10, D13
B15
GPMC0_WEn
O
GPMC Write Enable (active low)
C14, D7
B9, D17
B14, B7
GPMC0_WPn
O
GPMC Flash Write Protect (active
low)
D9
C9
C11
GPMC0_A0
O
GPMC Address 0 Output. Only used
to effectively address 8-bit data non-
multiplexed memories
C11
B13
B11
C13
GPMC0_A1
O
GPMC Address 1 Output in A/D non-
multiplexed mode and Address 17 in
A/D multiplexed mode
C2
B1
A3
A3
GPMC0_A2
O
GPMC Address 2 Output in A/D non-
multiplexed mode and Address 18 in
A/D multiplexed mode
D2
A3
C5
A4
GPMC0_A3
O
GPMC Address 3 Output in A/D non-
multiplexed mode and Address 19 in
A/D multiplexed mode
B2
B3
A4
B5
GPMC0_A4
O
GPMC Address 4 Output in A/D non-
multiplexed mode and Address 20 in
A/D multiplexed mode
D3
A2
B4
A5
GPMC0_A5
O
GPMC Address 5 Output in A/D non-
multiplexed mode and Address 21 in
A/D multiplexed mode
B16
B19
C15
GPMC0_A6
O
GPMC Address 6 Output in A/D non-
multiplexed mode and Address 22 in
A/D multiplexed mode
B1
C3
A5
A6
GPMC0_A7
O
GPMC Address 7 Output in A/D non-
multiplexed mode and Address 23 in
A/D multiplexed mode
A11
A13
A12
A12
GPMC0_A8
O
GPMC Address 8 Output in A/D non-
multiplexed mode and Address 24 in
A/D multiplexed mode
A16
A19
C16
GPMC0_A9
O
GPMC Address 9 Output in A/D non-
multiplexed mode and Address 25 in
A/D multiplexed mode
E3
C2
C4
B2
GPMC0_A10
O
GPMC Address 10 Output in A/D
non-multiplexed mode and Address
26 in A/D multiplexed mode
D1
D2
B1
B1
GPMC0_A11
O
GPMC Address 11 Output in A/D
non-multiplexed mode and unused in
A/D multiplexed mode
E4
D1
C1
B3
GPMC0_A12
O
GPMC Address 12 Output in A/D
non-multiplexed mode and unused in
A/D multiplexed mode
F2
E2
C2
C2
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AM2612, AM2611, AM2611-Q1, AM2612-Q1
SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025
Copyright © 2025 Texas Instruments Incorporated
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