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AM261...ZCZQ1 数据表(PDF) 179 Page - Texas Instruments

部件名 AM261...ZCZQ1
功能描述  AM261x Sitara™ Microcontrollers
PDF  218 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

AM261...ZCZQ1 数据表(HTML) 179 Page - Texas Instruments

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PARAMETER
MIN
MAX
UNIT
CL
Output Load Capacitance
2
20
pF
6.11.5.14.7.2.2 PRU-ICSS MII Timing Requirements - MII[x]_RX_CLK
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
PMIR1
tc(RX_CLK)
Cycle time, MII[x]_RX_CLK
10Mbps
399.96
400.04
ns
100Mbps
39.996
40.004
ns
PMIR2
tw(RX_CLKH)
Pulse duration, MII[x]_RX_CLK high
10Mbps
140
260
ns
100Mbps
14
26
ns
PMIR3
tw(RX_CLKL)
Pulse duration, MII[x]_RX_CLK low
10Mbps
140
260
ns
100Mbps
14
26
ns
MII_RX_CLK
PMIR2
PMIR3
PMIR1
PRU_MII_RT_TIMING_04
Figure 6-82. PRU-ICSS MII[x]_RX_CLK Timing
6.11.5.14.7.2.3 PRU-ICSS MII Timing Requirements - MII[x]_RXD[3:0], MII[x]_RX_DV, and MII[x]_RX_ER
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
PMIR4
tsu(RXD-RX_CLK)
Setup time, MII[x]_RXD[3:0] valid before
MII[x]_RX_CLK
10Mbps
8
ns
tsu(RX_DV-RX_CLK)
Setup time, MII[x]_RX_DV valid before
MII[x]_RX_CLK
8
ns
tsu(RX_ER-RX_CLK)
Setup time, MII[x]_RX_ER valid before
MII[x]_RX_CLK
8
ns
tsu(RXD-RX_CLK)
Setup time, MII[x]_RXD[3:0] valid before
MII[x]_RX_CLK
100Mbps
8
ns
tsu(RX_DV-RX_CLK)
Setup time, MII[x]_RX_DV valid before
MII[x]_RX_CLK
8
ns
tsu(RX_ER-RX_CLK)
Setup time, MII[x]_RX_ER valid before
MII[x]_RX_CLK
8
ns
PMIR5
th(RX_CLK-RXD)
Hold time, MII[x]_RXD[3:0] valid after
MII[x]_RX_CLK
10Mbps
8
ns
th(RX_CLK-RX_DV)
Hold time, MII[x]_RX_DV valid after
MII[x]_RX_CLK
8
ns
th(RX_CLK-RX_ER)
Hold time, MII[x]_RX_ER valid after
MII[x]_RX_CLK
8
ns
th(RX_CLK-RXD)
Hold time, MII[x]_RXD[3:0] valid after
MII[x]_RX_CLK
100Mbps
8
ns
th(RX_CLK-RX_DV)
Hold time, MII[x]_RX_DV valid after
MII[x]_RX_CLK
8
ns
th(RX_CLK-RX_ER)
Hold time, MII[x]_RX_ER valid after
MII[x]_RX_CLK
8
ns
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AM2612, AM2611, AM2611-Q1, AM2612-Q1
SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025
Copyright © 2025 Texas Instruments Incorporated
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Product Folder Links: AM2612 AM2611 AM2611-Q1 AM2612-Q1



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