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AM261...ZCZQ1 数据表(PDF) 64 Page - Texas Instruments |
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AM261...ZCZQ1 数据表(HTML) 64 Page - Texas Instruments |
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64 / 218 page ![]() Table 5-31. GPIO Signal Descriptions (continued) Signal Name [1] Pin Type [2] Description [3] ZCZ PIN [4] ZFG PIN [4] ZEJ PIN [4] ZNC PIN [4] GPIO66 IO General Purpose Input/Output J1 K2 G3 GPIO67 IO General Purpose Input/Output K2 K1 G2 G2 GPIO68 IO General Purpose Input/Output J4 L4 H3 H1 GPIO69 IO General Purpose Input/Output K4 L1 H2 H2 GPIO70 IO General Purpose Input/Output K3 M2 G1 J1 GPIO71 IO General Purpose Input/Output V17 W16 R14 V15 GPIO72 IO General Purpose Input/Output T16 Y16 T14 W15 GPIO73 IO General Purpose Input/Output P15 W17 T15 W16 GPIO74 IO General Purpose Input/Output R16 Y17 R15 V16 GPIO75 IO General Purpose Input/Output L3 T3 M1 L2 GPIO76 IO General Purpose Input/Output M3 R4 L1 M1 GPIO77 IO General Purpose Input/Output B6 B7 GPIO78 IO General Purpose Input/Output A4 A6 GPIO79 IO General Purpose Input/Output B5 B6 GPIO80 IO General Purpose Input/Output B4 A5 GPIO81 IO General Purpose Input/Output A3 B5 GPIO82 IO General Purpose Input/Output A2 A4 GPIO83 IO General Purpose Input/Output C6 B4 GPIO84 IO General Purpose Input/Output A5 A7 GPIO85 IO General Purpose Input/Output L17 R19 K15 N17 GPIO86 IO General Purpose Input/Output L18 R20 K16 P19 GPIO87 IO General Purpose Input/Output G17 K19 F14 G17 GPIO88 IO General Purpose Input/Output F17 J19 E15 GPIO89 IO General Purpose Input/Output G18 J20 E16 J18 GPIO90 IO General Purpose Input/Output G15 J18 E14 G19 GPIO91 IO General Purpose Input/Output K15 N20 H15 L18 GPIO92 IO General Purpose Input/Output K16 L20 G15 J19 GPIO93 IO General Purpose Input/Output K17 N17 K14 M18 GPIO94 IO General Purpose Input/Output K18 N19 H14 L19 GPIO95 IO General Purpose Input/Output J18 M18 G16 K19 GPIO96 IO General Purpose Input/Output J17 M20 J14 L17 GPIO97 IO General Purpose Input/Output H18 M19 F16 K18 GPIO98 IO General Purpose Input/Output L16 P18 H16 M19 GPIO99 IO General Purpose Input/Output M16 P20 J15 N18 (1) The GPIO3 pin is also used as SOP0 bootmode configuration pin. (2) The GPIO4 pin is also used as SOP1 bootmode configuration pin. (3) GPIO135 is implemented with the I2C OD FS (Open Drain Fail Safe) voltage buffer. (4) GPIO134 is implemented with the I2C OD FS (Open Drain Fail Safe) voltage buffer. (5) The GPIO12 pin is also used as SOP2 bootmode configuration pin. (6) The GPIO13 pin is also used as SOP3 bootmode configuration pin. (7) In OSPI boot mode, the AM261x ROM code configures GPIO61 as OSPI0_RESET_OUT0 and drives the pin low to reset an external OSPI device during this boot mode. However, due to a configuration in the OSPI controller, this pin does not de-assert after and external OSPI flash device resets, thus holding any external flash device in reset and causing the boot to fail. This means that GPIO61 is pulled high and then configured low until after boot is completed, which may affect certain applications. For more information, see the AM261x Errata Document. (8) For additional information on OSPI flash reset, see OSPI Reset within the Applications, Implementation and Layout section. AM2612, AM2611, AM2611-Q1, AM2612-Q1 SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025 www.ti.com 64 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: AM2612 AM2611 AM2611-Q1 AM2612-Q1 |
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