M95M01-RMW6TG datasheet(24/40 Pages) STMICROELECTRONICS

24 / 40 page

Instructions

M95M01-R

24/40

6.5

Read from Memory Array (READ)

As shown in Figure 11, to send this instruction to the device, Chip Select (S) is first driven

Low. The bits of the instruction byte and address bytes are then shifted in, on Serial Data

Input (D). The address is loaded into an internal address register, and the byte of data at

that address is shifted out, on Serial Data Output (Q).

If Chip Select (S) continues to be driven Low, the internal address register is automatically

incremented, and the byte of data at the new address is shifted out.

When the highest address is reached, the address counter rolls over to zero, allowing the

Read cycle to be continued indefinitely. The whole memory can, therefore, be read with a

single READ instruction.

The Read cycle is terminated by driving Chip Select (S) High. The rising edge of the Chip

Select (S) signal can occur at any time during the cycle.

The first byte addressed can be any byte within any page.

The instruction is not accepted, and is not executed, if a Write cycle is currently in progress.

Figure 11.

Read from Memory Array (READ) sequence

As shown in Table 6, the most significant address bits are Don’t Care.

Table 6.

Address range bits(1)

Bits A23 to A17 are Don’t Care.

M95M01-R

Address bits

A16-A0

AI13878

3456789 10

28 29 30 31 32 33 34 35

22 21

3210

36 37 38

76543

High Impedance

Data Out 1

Instruction

24-bit address

MSB

Data Out 2

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