M54/74HC242

M54/74HC243

October 1993

QUAD BUS TRANSCEIVER (3-STATE)

B1R

(Plastic Package)

ORDER CODES :

M54HCXXXF1R

M74HCXXXM1R

M74HCXXXB1R

M74HCXXXC1R

F1R

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

PIN CONNECTIONS (top view)

NC =

No Internal

Connection

INPUT AND OUTPUT EQUIVALENT CIRCUIT

DESCRIPTION

.

HIGH SPEED

.

LOW POWER DISSIPATION

µA (MAX.) AT 25 °C

.

OUTPUT DRIVE CAPABILITY

15 LSTTL LOADS

.

BALANCED PROPAGATION DELAYS

.

SYMMETRICAL OUTPUT IMPEDANCE

.

HIGH NOISE IMMUNITY

.

WIDE OPERATING VOLTAGE RANGE

.

PIN AND FUNCTION COMPATIBLE

WITH 54/74LS242/243

The M54/74HC242/243 are high speed CMOS

QUAD

BUS

TRANSCEIVER

(3-STATE)

FABRICATED

IN

SILICON

GATE

C

technology. They have the same high speed

performance of LSTTL combined with true CMOS

low power consumption. The HC242/243 are 3

STATE bi-directional inverting and non-inverting

buffers and are intended for two-way asynchronous

communication between data buses. They are high

drive current outputs which enable high speed

operation when driving large bus capacitances.

Each device has one active high enable (GBA), and

one active low enable (GAB). GBA enables the A

outputs and GAB enables the B outputs. All inputs

are equipped with protection circuits against static

discharge and transient excess voltage.

HC243

HC242

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