INPUT AND OUTPUT EQUIVALENT CIRCUIT

TRUTH TABLE

MODE

INPUTS

INPUTS/OUTPUTS

OUTPUTS

CLEAR

FUNCTION

SELECTED

OUTPUT

CONTROL

CLOCK

SERIAL

A/QA

H/QH

QA’

QH’

S1

S0

G1 *

G2 *

(299)

(323)

SL

SR

Z

L

H

H

X

XXX

X

Z

Z

L

L

CLEAR

L

L

X

LLX

X

X

L

L

L

L

L

X

LL

L

X

X

X

LLL

L

HOLD

H

L

L

L

L

X

X

X

QA0

QH0

QA0

QH0

SHIFT

RIGHT

H

L

H

L

L

X

H

H

QGn

H

QGn

H

L

H

L

L

X

L

L

QGn

L

QGn

SHIFT

LEFT

H

H

L

L

L

H

X

QBn

H

QBn

H

H

H

L

L

L

L

X

QBn

L

QBn

L

LOAD

H

H

H

X

X

X

X

a

h

a

h

* When one or both output controls are high, the eight, input/output terminals are in the high impedance state: however sequential operation or clearing

of the register is not affected.

Z

: HIGH IMPEDANCE

Qn0 : THE LEVEL OF An BEFORE THE INDICATED STEADY STATE INPUT CONDITIONS WERE ESTABLISHED.

Qnn : THE LEVEL ON Qn BEFORE THE MOST RECENT ACTIVE TRANSITION INDICATED BY

OR

a, h : THE LEVEL OF THE STEADY STATE INPUTS A, H, RESPECTIVELY.

X

: DON’T CARE

M54/M74HC299/323

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