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M54HC323 数据表(PDF) 1 Page - STMicroelectronics |
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M54HC323 数据表(HTML) 1 Page - STMicroelectronics |
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1 / 15 page ![]() M54/74HC299 M54/74HC323 October 1993 HC323 8 BIT PIPO SHIFT REGISTER WITH SYNCHRONOUS CLEAR HC299 8 BIT PIPO SHIFT REGISTER WITHASYNCHRONOUS CLEAR B1R (Plastic Package) ORDER CODES : M54HCXXXF1R M74HCXXXM1R M74HCXXXB1R M74HCXXXC1R F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) PIN CONNECTIONS (top view) NC = No Internal Connection . HIGH SPEED fMAX = 42 MHz (TYP.) AT VCC =5V . LOW POWER DISSIPATION ICC =4 µA (MAX.) AT TA =25 °C . HIGH NOISE IMMUNITY VNIH =VNIL =28 % VCC (MIN.) . OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS FOR QA’ TO QH’ 15 LSTTL LOADS FOR QA TO QH . SYMMETRICAL OUTPUT IMPEDANCE IOH =IOL = 6 mA (MIN.) FOR QA,TOQH, IOH =IOL = 4 mA (MIN.) FOR QA,TOQH . BALANCED PROPAGATION DELAYS tPLH =tPHL . WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V . PIN AND FUNCTION COMPATIBLE WITH 54/74LS299 DESCRIPTION The M54/74HC299/323 are high speed CMOS 8- BIT PIPO SHIFT REGISTERS (3-STATE) fabri- cated with silicon gate C 2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power consumption. These devices have four modes (HOLD, SHIFT LEFT, SHIFT RIGHT and LOAD DATA). Each mode is chosen by two function select inputs (S0, S1). When one or both enable inputs, (G1, G2) are high, the eight input/output terminals are in the high- impedance state ; however sequential operation or clearing of the register is not affected. Clear function on the HC299 is asynchronous to CLOCK, while the HC323 is cleared synchronous to clock. All inputs are equipped with protection circuits against static discharge and transient excess volt- age. 1/15 |
类似零件编号 - M54HC323 |
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类似说明 - M54HC323 |
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