STPM11 datasheet(23/45 Pages) STMICROELECTRONICS

23 / 45 page

STPM11/12/13/14

Theory of operation

23/45

When internal signals are not good enough to perform the computation, i.e. line period is out

or range or

∑Δ signals from the analog part are stacked at high or low logic level, or no load

condition is activated, the tamper module is disabled and its state is preset to normal.

7.10

Phase compensation

The STPM1X is does not introduce any phase shift between voltage and current channels.

However, the voltage and current signals come from transducers, which could have inherent

phase errors. For example, a phase error of 0.1° to 0.3° is not uncommon for a current

transformer (CT). These phase errors can vary from part to part, and they must be corrected

in order to perform accurate power calculations. The errors associated with phase mismatch

are particularly noticeable at low power factors. The STPM1x provide a means of digitally

calibrating these small phase errors through a introducing delays on the voltage or current

signal. The amount of phase compensation can be set using the 4 bits of the phase

calibration register (CPH).

The default value of this register is at a value of 0 which gives 0° phase compensation. A

CPH value of 15 (1111) introduces a phase compensation of +0.576°. This compensates

the phase shift usually introduced by the current sensor, while the voltage sensor, normally

a resistor divider, does not introduce any delay. The resolution step of the phase

compensation is 0.038°.

7.11

Clock generator

All the internal timing of the STPM1X is based on the CLKOUT signal. This signal is

generated by different circuits according to the STPM1x version.

STPM11/13: Internal RC Oscillator. A resistor connected between CLKIN and Ground

will set the RC current. For 4 MHz operation the suggested settling resistor is 12 k

Ω;

The oscillator frequency can be compensated using the CRC configuration bit (see

Table 13 and Figure 14)

STPM12/14: Quartz Oscillator. The oscillator circuit is designed to support an external

crystal. The suggested circuit is depicted in Figure 18. These versions support also an

external oscillator signal source that must be connected to the CLKOUT pin.

The clock generator is powered from analog supply and is responsible for two tasks. The

first one is to retard the turn-on of some function blocks after POR in order to help smooth

start of external power supply circuitry by keeping all major loads off.

The second task of the clock generator is to provide all necessary clocks for analog and

digital parts. Within this task, the MDIV configuration bit is used to inform the device about

the nominal frequency value of CLKOUT. The suggested operation frequency range is from

4.000 MHz to 4.194 MHz.

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