TRUTH TABLE

INPUTS

OUTPUTS

SELECT *

DC

OUTPUT ENABLES

WY

S2

S1

S0

G1

G2

G3

XXXXH

XXZ

Z

XXXX

X

H

XZ

Z

XXXX

X

X

L

Z

Z

LL

LL

LL

H

D0

D0

L

L

L

H

L

L

H

D0n

D0n

L

LHL

L

L

H

D1

D1

L

L

H

H

L

L

H

D1n

D1n

L

H

L

L

L

L

H

D2

D2

LHLHL

L

H

D2n

D2n

LH

HL

L

L

H

D3

D3

L

H

H

H

L

L

H

D3n

D3n

HLL

LL

L

H

D4

D4

H

L

L

H

L

L

H

D4n

D4n

H

LHL

L

L

H

D5

D5

H

L

H

H

L

L

H

D5n

D5n

H

H

LL

LL

H

D6

D6

H

HLHL

L

H

D6n

D6n

HH

H

L

L

L

H

D7

D7

H

H

H

H

L

L

H

D7n

D7n

X: DON’T CARE Z: HIGH IMPEDANCE *: THISCOLUMN SHOWS THE INPUT ADDRESS SETUP WITH SC LOW

D0n ....D7n: THE LEVEL OF STEADY-STATE INPUTS AT INPUT DO THROUGH D7, RESPECTIVELY, BEFORE THE MOST RECENT LOW TO

HIGH TRANSITION OF DATA CONTROL.

PIN DESCRIPTION

PIN No

SYMBOL

NAME AND FUNCTION

8, 7, 6, 5,

4, 3, 2, 1

D0 to D7

Data Inputs

9

DC

Data Enable Input (Active

LOW)

11

SC

Latch Enable Input

(Active LOW)

14, 13, 12

SO, S1, S2

Select Inputs

15, 16

G1, G2

Output Enable Inputs

(Active LOW)

17

G3

Output Enable Input

(Active HIGH)

18

W

3 State Multiplexer Output

(Active LOW)

19

Y

3 State Multiplexer Output

(Active HIGH)

10

GND

Ground (0V)

20

Positive Supply Voltage

IEC LOGIC SYMBOL

M54/M74HC354

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