M54/M74HC367

M54/M74HC368

October 1992

HC367 NON INVERTING, HC368 INVERTING

HEX BUS BUFFER (3-STATE)

B1R

(Plastic Package)

ORDER CODES :

M54HCXXXF1R

M74HCXXXM1R

M74HCXXXB1R

M74HCXXXC1R

F1R

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

PIN CONNECTIONS (top view)

HC368

HC367

DESCRIPTION

.

HIGH SPEED

.

LOW POWER DISSIPATION

.

HIGH NOISE IMMUNITY

.

OUTPUT DRIVE CAPABILITY

15 LSTTL LOADS

.

SYMMETRICAL OUTPUT IMPEDANCE

.

BALANCED PROPAGATION DELAYS

.

WIDE OPERATING VOLTAGE RANGE

.

PIN AND FUNCTION COMPATIBLE WITH

54/74LS367/368

The M54/74HC367 and the M54/74HC368 are high

speed CMOS HEX BUS BUFFER (3-STATE) fabri-

cated in silicon gate C

the same high speed performance of LSTTL com-

bined with true CMOS low power consumption.

These devices contain six buffers, four buffers are

controlled by an enable input (G1) and the other two

buffers are controlled by the other enable input

(G2) ; the outputs of each buffer group are enabled

when G1 and/or G2 inputs are held low, and

when held high these outputs are disabled to be

high-impedance.

These outputs are capable of driving up to 15 LSTTL

loads. The designer has a choice of non-inverting

outputs (HC367) and inverting outputs (HC368).

All inputs are equipped with protection circuits

against static discharge and transient excess volt-

age.

1/11