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output (push-pull, open drain) or multiplexing functions. Most GPIO pins are

shared with multiplexed peripherals. In addition, some pins have redefined

functions, such as analog input, external interrupt, and input/output of chip

peripherals, but only one function can be mapped to a pin at the same time. The

remapping of multiplexing functions can be realized by controlling option bytes.

Please refer to the description of option bytes in the data manual.

Communication interface

4.9.1.

Universal asynchronous transceiver (USART)

Embedded with three USART communication interfaces, USART interface can

support 2.5Mbit/s communication rate, and it has SPI emulation, high-precision

baud rate generator, smart card emulation, IrDA SIR codec, LIN main mode and

single-line half-duplex mode.

Table 7 Communication mode of universal asynchronous transceiver

Communication mode

description

Asynchronous

communication (USART

mode)

Full duplex NRZ standard format communication (mark/space)

Programmable transmission and reception baud rate is up to

2.5Mbit/s, which can follow any standard baud rate at input

frequency

Independent enable bits for sending and receiving

There are two wake-up modes: address bit (MSB) and idle line

(interrupt)

Transmission error detection and interrupt generation

Parity control

Synchronous communication

Full duplex synchronous transmission

SPI main operation

8-bit data communication

Maximum speed: 1mbit/s at 16MHz (fcpu/16)

LIN main mode

Transmit: generate a 13-bit synchronous interrupt frame

Receive: detect an 11-bit interrupt frame

4.9.2.

I2C bus

Embedded with an I2C interface, it is led out through data pin (SDA) and clock

pin (SCL), and can turn on or interrupt disable. It can work in multi-master mode

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