 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
AM261...ZEJ 数据表(PDF) 83 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
AM261...ZEJ 数据表(HTML) 83 Page - Texas Instruments |
|
|
83 / 218 page  5.4 Pin Connectivity Requirements This section describes connectivity requirements for package balls that have specific connectivity requirements as well as any unused balls. Pin Connectivity Requirements ZCZ Ball Number ZFG Ball Number ZEJ Ball Number ZNC Ball Number Ball Name Pin Connectivity Requirements D4 E3 B3 C5 SAFETY_ERRORn This pin must be connected to ground (VSS) through a separate external pull resistor to ensure it is held to a valid logic low level if a PCB signal trace is connected and not actively driven by an attached device. The internal pull–down may be used to hold a valid logic low level if no PCB signal trace is connected to the ball. B3 C5 D5 D4 C5 D6 C6 D5 C7 B6 C7 B7 TCK TDI TMS Each of these pins must be connected to the corresponding power supply through separate external pull resistors to ensure these balls are held to a valid logic high level if a PCB signal trace is connected and not actively driven by an attached device. The internal pull–up may be used to hold a valid logic high level if no PCB signal trace is connected to the ball. A13 B13 A15 B15 A13 B12 A13 B13 GPIO135 (I2C0_SCL) GPIO134 (I2C0_SDA) Each of these pins must be connected to the corresponding power supply through separate external pull resistors to ensure these balls are held to a valid logic high level. N1 N4 A11 C10 R2 R1 A13 B12 M2 N1 A12 A10 N2 N1 A12 B12 GPIO3 (SOP0) GPIO4 (SOP1) GPIO12 (SOP2) GPIO13 (SOP3) Each of these pins must be connected to the corresponding power supply or ground (VSS) through separate external pull resistors to ensure these balls are held to a valid logic high or low level as appropriate to select the desired device boot mode. U16 V16 R13 U15 ADC_CAL0 If all ADCx_AINy inputs for all ADC instances (ADC[0:2]_AIN[0:6]) are not used, the ADC_CAL0 analog pin must be connected (shorted) directly to ground (VSS). U2 Y4 R5 V5 VSYS_MON If VSYS_MON is not used, this pin may be connected (shorted) directly to ground (VSS). T4 V7 N8 T8 VDD_TEMP If the internal temp diode is being used this pin must be connected to the 1.2V/1.25V power rail. If the internal temp diode is not being used this pin can be connected (shorted) directly to ground (VSS). T6 W5 T4 W5 ATESTV1 This pin is reserved and must be left unconnected. U1 W3 P5 W4 TEMPCAL This pin is reserved and must be connected to ground (VSS). NC ZCZ PIN NC ZFG PIN - - NC Any pin labeled NC should be left unconnected. ADC ZCZ PIN ADC ZFG PIN ADC ZEJ PIN ADC ZNC PIN ADC[0:2]_AIN[0:6] Any unused ADCx_AINy input pin for any ADC instance (ADC[0:2]_AIN[0:6]) must be connected (shorted) directly to ground (VSS). LVCMOS ZCZ PIN LVCMOS ZFG PIN LVCMOS ZEJ PIN LVCMOS ZNC PIN Any LVCMOS Voltage Buffer Pin If an associated IOMUX pad configuration register exists for a given pin, it may remain unconnected. After PORz, the LVCMOS voltage buffer is configured to a default state compatible with an unconnected ball. www.ti.com AM2612, AM2611, AM2611-Q1, AM2612-Q1 SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 83 Product Folder Links: AM2612 AM2611 AM2611-Q1 AM2612-Q1 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
