AM261...ZCZQ1 datasheet(54/218 Pages) TI2

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5.3.1.1 ADC-CMPSS Signal Connections

In each ADC, three sets of differential pins shall be shared with pins of three CMPSSA . These pins are

demonstrated in Figure 5-5 and Table 5-5 where the CHSEL values determine how the inputs are fed into ADC.

12-bit

DAC

12-bit

DAC

DAC-H

Code

DAC-L

Code

CMPSS-A

12-bit

DAC

12-bit

DAC

DAC-H

Code

DAC-L

Code

CMPSS-A

INP-0

INM-0

INP-1

INM-1

INP-2

INM-2

CAL-0

CAL-1

ATB

12-bit

3 MSPS

12-bit

DAC

12-bit

DAC

DAC-H

Code

DAC-L

Code

CMPSS-A

Figure 5-5. CMPSS and ADC Connections

Note

The ADC sampling speed for AM261x is 3MSPS.

Table 5-5. Connectivity between ADC Inputs to CMPSS Signals

Signal/Pin Name

ADC Input

CMPSS Input

ADC0 Channels

ADC0_AIN0

ADC0:inp0 (+IN0)

CMPSSA0:inH (+IN)

ADC0_AIN1

ADC0:inm0 (-IN0)

CMPSSA0:inL (-IN)

ADC0_AIN2

ADC0:inp1 (+IN1)

CMPSSA1:inH (+IN)

ADC0_AIN3

ADC0:inm1 (-IN1)

CMPSSA1:inL (-IN)

ADC0_AIN4

ADC0:inp2 (+IN2)

CMPSSA2:inH (+IN)

ADC0_AIN5

ADC0:inm2 (-IN2)

CMPSSA2:inL (-IN)

ADC0_AIN6

ADC0:inm3 (-IN3)

ADC_CAL0

ADC0:inp3 (+IN3)

ADC1 Channels

ADC1_AIN0

ADC1:inp0 (+IN0)

CMPSSA2:inH (+IN)

ADC1_AIN1

ADC1:inm0 (-IN0)

CMPSSA2:inL (-IN)

ADC1_AIN2

ADC1:inp1 (+IN1)

CMPSSA3:inH (+IN)

ADC1_AIN3

ADC1:inm1 (-IN1)

CMPSSA3:inL (-IN)

ADC1_AIN4

ADC1:inp2 (+IN2)

CMPSSA4:inH (+IN)

ADC1_AIN5

ADC1:inm2 (-IN2)

CMPSSA4:inL (-IN)

ADC1_AIN6

ADC1:inm3 (-IN3)

ADC_CAL0

ADC1:inp3 (+IN3)

ADC2 Channels

AM2612, AM2611, AM2611-Q1, AM2612-Q1

SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025

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