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M54HC690 数据表(PDF) 15 Page - STMicroelectronics

部件名 M54HC690
功能描述  HC691/693 4 BIT BINARY COUNTER/REGISTER 3-STATE HC690/692 DECADE COUNTER/REGISTER 3-STATE
PDF  23 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M54HC690 数据表(HTML) 15 Page - STMicroelectronics

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Symbol
Parameter
Test Conditions
Value
Unit
VCC
(V)
CL
(pF)
TA =25
oC
54HC and 74HC
-40 to 85
oC
74HC
-55 to 125
oC
54HC
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
fMAX
Maximum Clock
Frequency
2.0
50
4.4
12
3.6
3
MHz
4.5
22
45
18
15
6.0
26
53
21
18
tPZL
tPZH
Output Enable
Time
2.0
50
RL =1 K
Ω
48
120
150
180
ns
4.5
15
24
30
36
6.0
13
20
26
31
2.0
150
RL =1 K
Ω
61
150
190
225
ns
4.5
19
30
38
45
6.0
17
26
32
38
tPLH
tPHL
Output Disable
Time
2.0
50
RL =1 K
Ω
32
145
180
220
ns
4.5
15
29
36
44
6.0
13
25
31
37
tW(H)
tW(L)
Minimum Pulse
Width
(CCK - RCK)
2.0
50
28
75
95
110
ns
4.5
7
151922
6.0
6
131619
tW(L)
Minimum Pulse
Width
(CCLR - RCLR)
(for HC690/691)
2.0
50
40
75
95
110
ns
4.5
8
151922
6.0
7
131619
ts
Minimum Set-up
Time (LOAD,
ENT, ENP)
2.0
50
68
150
190
220
ns
4.5
17
30
38
44
6.0
14
26
32
37
ts
Minimum Set-up
Time
(A, B, C, D)
2.0
50
44
100
125
145
ns
4.5
11
20
25
29
6.0
9
172125
ts
Minimum Set-up
Time
(CCLR, RCLR)
(for HC692/693)
2.0
50
44
100
125
145
ns
4.5
11
20
25
29
6.0
9
172125
ts
Minimum Set-up
Time
(CCK, RCK)
2.0
50
48
125
155
180
ns
4.5
12
25
31
36
6.0
10
21
26
31
th
Minimum Hold
Time
2.0
50
000
ns
4.5
0
0
0
6.0
0
0
0
tREM
Minimum
Removal Time
(for HC690/691)
2.0
50
25
30
40
ns
4.5
5
6
8
6.0
5
5
7
CIN
Input Capacitance
5
10
10
10
pF
CPD (*)
Power Dissipation
Capacitance
for HC690/691
for HC692/693
70
80
pF
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD
•VCC •fIN +ICC
AC ELECTRICAL CHARACTERISTICS (Continued)
M54/M74HC690/691/692/693
15/23



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