Obsolete

Product(s)

- Obsolete

Product(s)

STHS4257A, STHS4257A1, STHS4257L, STHS4257L1

Electrical parameters

13/18

Input Current Limit, Low Level,

STHS4257x1

(inrush mode)

100

140

180

mA

(14)

300

350

400

mA

Overtemperature Input Current

Limit, STHS4257x

(14)

188

mA

Overtemperature Trip

Temperature, STHS4257x

(14)

120

°C

Thermal Shutdown Trip

Temperature

140

°C

1.

The STHS4257 family of PoE products operates with a negative supply voltage (with respect to the GND pin, unless

otherwise noted). Voltages in this data sheet are always referred to in terms of absolute magnitude, thus "maximum

negative voltage" means the most negative voltage and analogically "rising negative voltage" refers to a voltage that is

becoming more negative.

2.

The STHS4257 family of products is designed to work with two series diode drops caused by diode bridge that makes the

PD input polarity-insensitive. Parameter ranges specified in the Electrical Parameters Table are with respect to

STHS4257x/x1 pins and are designed to meet the IEEE 802.3af specifications when these diode drops are included. See

Figure 4 on page 8.

3.

The STHS4257x/x1 devices include hysteresis in the UVLO voltages to avoid any start-up oscillation. As required by IEEE

802.3af, the STHS4257 family devices will power up from a voltage source with 20

Ω series resistance on the first trial.

4.

5.

6.

Signature resistance is measured via the 2-point

ΔV/ΔI method as defined by IEEE 802.3af standard. The STHS4257

device family signature resistance is offset from standard 25k

Ω to account for the series diode bridge resistance. With two

series diodes, the total PD resistance will be between 23.75k

Ω and 26.25kΩ which meets IEEE 802.3af specifications. The

minimum probe voltages measured at the STHS4257x/x1 pins are –1.5 and –2.5V. The maximum probe voltages are –8.5

and –9.5V.

7.

To disable the 25k

page 8.

8.

10% from its initial value (i.e. when the output capacitor is fully charged).

9.

GND pin at the same potential as PWRGD pin to prevent ESD protection from impacting the measured results. To keep

PWRGD MOSFET off under this condition, maintain uninterrupted inrush current e.g. by applying 1V voltage between

STHS4257x1 is also protected against thermal damage from incorrect classification probing by the PSE: If the

12. The STHS4257x1 includes dual level input current limit. At turn-on, before output capacitor C2 is charged, the

STHS4257x1 current level is set to the low level. After the output capacitor C2 is charged, the STHS4257x1 switches to

high level current limit and remains there until the input voltage drops below the UVLO turn-off threshold.

13. The STHS4257 family devices include overtemperature protection that is intended to protect the device during momentary

overload conditions only. Continuous operation close to overtemperature limits may impair device reliability.

14. The STHS4257x includes smart thermal protection. In the event of an overtemperature condition, the STHS4257x will

reduce the input current limit by 50% to reduce the power dissipation in the package. If the part continues heating and

current is disabled.

Table 5.

Electrical parameters (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit