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TMS320DM647_0804 数据表(PDF) 55 Page - Texas Instruments

部件名 TMS320DM647_0804
功能描述  Digital Media Processor
PDF  182 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TMS320DM647_0804 数据表(HTML) 55 Page - Texas Instruments

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5.3 Electrical Characteristics
TMS320DM647/TMS320DM648
Digital Media Processor
www.ti.com
SPRS372B – MAY 2007 – REVISED APRIL 2008
Over Recommended Ranges of Supply Voltage and Operating Temperature (Unless Otherwise Noted)
PARAMETER
TEST CONDITIONS (1)
MIN
TYP
MAX
UNIT
3.3-V pins (except PCI-capable
DVDD33 = MIN, IOH = MAX
0.8DVDD33
V
and I2C pins)
VOH High-level
output voltage
PCI-capable pins(2)
DVDD33 = 3.3V, IOH = -0.5 mA
0.9DVDD33
DDR2 memory controller pins
1.4
3.3-V pins (except PCI-capable
DVDD33 = MIN, IOL = MAX
0.22DVDD33
and I2C pins)
VOL Low-level
PCI-capable pins(2)
DVDD33 = 3.3V, IOL = 1.5 mA
0.1DVDD33
output voltage
I2C pins
Pulled up to 3.3 V, 3 mA sink current
0.4
DDR2 memory controller pins
0.4
V
VI = VSS to DVDD33 without internal pullup oe
-1
1
µA
pulldown resistor
3.3-V pins (except PCI-capable
VI = VSS to DVDD33 with internal pullup resistor
50
100
400
µA
and I2C pins)
(2)
II Input current [dc]
VI = VSS to DVDD33 with opposing internal
-400
-100
-50
µA
pulldown resistor (2)
Input current [dc] (I2C)
0.1DVDD33 ≤ VI ≤ 0.9DVDD33
-10
10
µA
PCI-capable pins(4)
-600
600
µA
IOH High-level
All peripherals other than DDR2
-8
mA
output current [dc]
and PCI
DDR2 memory controller pins
-4
mA
PCI-capable pins(2)
-0.5
mA
IOL Low-level
All peripherals other than DDR2
8
mA
output current [dc]
, PCI and I2C
I2C pins
3
mA
DDR2 memory controller pins
4
mA
PCI-capable pins(2)
1.5
mA
IOZ I/O Off-state
3.3-V pins
-20
20
µA
output current [DC]
CVDD = 1.2-V, DSP clock = 720 MHz
1727
mA
Core (CVDD, VDDA_1P1V) supply
ICDD
current(3)
CVDD = 1.2-V, DSP clock = 900 MHz
1980
mA
DVDD = 3.3-V, DSP clock = 720 MHz
200
mA
3.3-V I/O (DVDD33) supply
IDDD
current(3)
DVDD = 3.3-V, DSP clock = 900 MHz
202
mA
1.8-V I/O (DVDDR2,
DVDD = 1.8-V, DSP clock = 720 MHz
230
mA
DDR_VDDDLL, PLLVPRW18,
IDDD
VDDA_1P8V, MXVDD) supply
DVDD = 1.8-V, DSP clock = 900 MHz
230
mA
current(3)
CI
Input capacitance
10
pF
Co
Output capacitance
10
pF
(1)
For test conditions shown as MIN, MAX, or NOM, use the appropriate value specified in the recommended operating conditions table.
(2)
Applies only to pins with an internal pullup (IPU) or pulldown (IPD) resistor.
(3)
Assumes the following conditions: 50% DSP CPU utilization; (peripheral configurations, other housekeeping activities) DDR2 at 50%
utilization (266 MHz ), 50% writes, 32 bits, 100% bit switching, 110-MHz Video Ports at 100% utilization, MCASP operating at 25 Mhz
with 100% utilization with 10 serializers, Timer0,1 at 100% utilization, VICP with 100% utilization, PCI operating at 66 Mhz with 50%
writes at room temp (25°C) using ZUT package. (as in the power appnote) for the three items.
Submit Documentation Feedback
Device Operating Conditions
55



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