M54/M74HCT367

M54/M74HCT368

February 1993

HCT367 NON INVERTING, HCT368 INVERTING

HEX BUS BUFFER (3-STATE)

B1R

(Plastic Package)

ORDER CODES :

M54HCTXXXF1R

M74HCTXXXM1R

M74HCTXXXB1R

M74HCTXXXC1R

F1R

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

PIN CONNECTIONS (top view)

HCT368

HCT367

DESCRIPTION

.

HIGH SPEED

.

LOW POWER DISSIPATION

.

COMPATIBLE WITH TTL OUTPUTS

.

OUTPUT DRIVE CAPABILITY

15 LSTTL LOADS

.

SYMMETRICAL OUTPUT IMPEDANCE

.

BALANCED PROPAGATION DELAYS

.

PIN AND FUNCTION COMPATIBLE WITH

54/74LS367/368

The M54/74HCT367 and the M54/74HCT368 are

high speed CMOS HEX BUS BUFFER (3-STATE)

fabricated in silicon gate C

have the same high speed performance of LSTTL

combined with true CMOS low power consumption.

These devices contain six buffers, four buffers are

controlled by an enable input (G1) and the other two

buffers are controlled by the other enable input

(G2) ; the outputs of each buffer group are enabled

when G1 and/or G2 inputs are held low, and

when held high these outputs are disabled to be

high-impedance.

These outputs are capable of driving up to 15 LSTTL

loads. The designer has a choice of non-inverting

outputs (HCT367) and inverting outputs (HCT368).

All inputs are equipped with protection circuits

against static discharge and transient excess volt-

age.

This integrated circuit has input and output charac-

teristics that are fully compatible with 54/74 LSTTL

logic families. M54/74HCT devices are designed to

directly interface HSC

NMOS components. They are also plug in replace-

ments for LSTTL devices giving a reduction of

power consumption.

All inputs are equipped with protection circuits

against static discharge and transient excess volt-

age.

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