Miniature Hi-Speed USB Transceiver with 1.8V ULPI Interface

SMSC USB332x

7

Revision 0.3 (02-04-08)

PRODUCT PREVIEW

A3

STP

Input,

CMOS

High

The Link asserts STP for one clock cycle

to stop the data stream currently on the

bus. If the Link is sending data to the

PHY, STP indicates the last byte of data

was on the bus in the previous cycle.

B3

VDD18

Power

N/A

External 1.8V Supply input pin. This pad

needs to be bypassed with a 0.1uF

capacitor to ground, placed as close as

possible to the USB332x.

B2

RESETB

Input,

CMOS,

Low

When low, the part is suspended with all

ULPI outputs tri-stated. When high, the

USB332x will operate as a normal ULPI

device. The state of this pin may be

changed asynchronously to the clock

signals. When asserted for a minimum of

1 microsecond and then de-asserted, the

ULPI registers are reset to their default

state and all internal state machines are

reset.

A2

REFCLK

Input,

CMOS

N/A

ULPI Clock Out Mode:

Model-specific reference clock.

See ORDER NUMBER(S): on page 2.

ULPI Clock In Mode:

60MHz ULPI clock input.

A1

RBIAS

Analog,

CMOS

N/A

Bias Resistor pin. This pin requires an

8.06k

Ω (±1%) resistor to ground, placed

as close as possible to the USB332x.

Nominal voltage during ULPI operation is

0.8V.

C3

GND

Ground

N/A

Ground.

Table 1 USB332x Pin Description (continued)

BALL

NAME

DIRECTION/

TYPE

ACTIVE

LEVEL

DESCRIPTION