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USB2226 数据表(PDF) 10 Page - SMSC Corporation

部件名 USB2226
功能描述  4th Generation USB 2.0 Flash Media Controller with Integrated Card Power FETs
PDF  23 Pages
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制造商  SMSC [SMSC Corporation]
网页  http://www.smsc.com
标志 SMSC - SMSC Corporation

USB2226 数据表(HTML) 10 Page - SMSC Corporation

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4th Generation USB 2.0 Flash Media Controller with Integrated Card Power FETs
Datasheet
Revision 1.4 (10-08-07)
10
SMSC USB2226
DATASHEET
Chapter 5 Pin Descriptions
This section provides a detailed description of each signal. The signals are arranged in functional
groups according to their associated interface.
The “n” symbol in the signal name indicates that the active, or asserted state occurs when the signal
is at a low voltage level. When “n” is not present before the signal name, the signal is asserted when
at the high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working
with a mixture of “active low” and “active high” signal. The term assert, or assertion indicates that a
signal is active, independent of whether that level is represented by a high or low voltage. The term
negate, or negation indicates that a signal is inactive.
5.1
PIN Descriptions
SYMBOL
128-PIN
VTQFP
BUFFER
TYPE
DESCRIPTION
CompactFlash (In True IDE mode) INTERFACE
CF_nCS1
61
O8PU
CF Chip Select 1:
This pin is the active low chip select 1 signal for the CF ATA device.
CF_nCS0
60
O8PU
CF Chip Select 0:
This pin is the active low chip select 0 signal for the task file registers
of CF ATA device in the True IDE mode.
CF_SA2
64
O8
CF Register Address 2:
This pin is the register select address bit 2 for the CF ATA device.
CF_SA1
63
O8
CF Register Address 1:
This pin is the register select address bit 1 for the CF ATA device.
CF_SA0
62
O8
CF Register Address 0:
This pin is the register select address bit 0 for the CF ATA device.
CF_IRQ
55
IPD
CF Interrupt:
This is the active high interrupt request signal from the CF device.
CF_D[15:8]
52
51
50
48
46
45
41
40
I/O8PD
CF Data 15-8:
The bi-directional data signals CF_D15-CF_D8 in True IDE mode
data transfer.
In the True IDE Mode, all of task file register operation occur on the
CF_D[7:0], while the data transfer is on CF_D[15:0].
The bi-directional data signal has an internal weak pull-down resistor.



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