M58BW016DB datasheet(28/63 Pages) STMICROELECTRONICS

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STATUS REGISTER

The Status Register provides information on the

current or previous Program, Erase, Block Protect

or Tuning Protection operation. The various bits in

the Status Register convey information and errors

on the operation. They are output on DQ7-DQ0.

To read the Status Register the Read Status Reg-

ister command can be issued. The Status Register

is automatically read after Program, Erase, Block

Protect, Program/Erase Resume commands. The

Status Register can be read from any address.

The contents of the Status Register can be updat-

ed during an erase or program operation by tog-

gling the Output Enable or Output Disable pins or

by dis-activating (Chip Enable, VIH) and then reac-

tivating (Chip Enable and Output Enable, VIL, and

Output Disable, VIH.) the device.

The Status Register bits are summarized in Table

11, Status Register Bits. Refer to Table 11 in con-

junction with the following text descriptions.

Program/Erase Controller Status (Bit 7)

The Program/Erase Controller Status bit indicates

whether the Program/Erase Controller is active or

inactive. When the Program/Erase Controller Sta-

tus bit is set to ‘0’, the Program/Erase Controller is

active; when bit7 is set to ‘1’, the Program/Erase

Controller is inactive.

The Program/Erase Controller Status is set to ‘0’

immediately after a Program/Erase Suspend com-

mand is issued until the Program/Erase Controller

pauses. After the Program/Erase Controller paus-

es the bit is set to ‘1’.

During Program and Erase operations the Pro-

gram/Erase Controller Status bit can be polled to

find the end of the operation. The other bits in the

Status Register should not be tested until the Pro-

gram/Erase Controller completes the operation

and the bit is set to ‘1’.

After the Program/Erase Controller completes its

operation the Erase Status (bit5), Program Status

and Tuning Protection Unlock status (bit4) bits

should be tested for errors.

Erase Suspend Status (Bit 6)

The Erase Suspend Status bit indicates that an

Erase operation has been suspended and is wait-

ing to be resumed. The Erase Suspend Status

should only be considered valid when the Pro-

gram/Erase Controller Status bit is set to ‘1’ (Pro-

gram/Erase Controller inactive); after a Program/

Erase Suspend command is issued the memory

may still complete the operation rather than enter-

ing the Suspend mode.

When the Erase Suspend Status bit is set to ‘0’,

the Program/Erase Controller is active or has com-

pleted its operation; when the bit is set to ‘1’, a Pro-

gram/Erase Suspend command has been issued

and the memory is waiting for a Program/Erase

Resume command.

When a Program/Erase Resume command is is-

sued the Erase Suspend Status bit returns to ‘0’.

Erase Status (Bit 5)

The Erase Status bit can be used to identify if the

memory has failed to verify that the block has

erased correctly. The Erase Status bit should be

read once the Program/Erase Controller Status bit

is High (Program/Erase Controller inactive).

When the Erase Status bit is set to ‘0’, the memory

has successfully verified that the block has erased

correctly. When the Erase Status bit is set to ‘1’,

the Program/Erase Controller has applied the

maximum number of pulses to the block and still

failed to verify that the block has erased correctly.

Once set to ‘1’, the Erase Status bit can only be re-

set to ‘0’ by a Clear Status Register command or a

hardware reset. If set to ‘1’ it should be reset be-

fore a new Program or Erase command is issued,

otherwise the new command will appear to fail.

Program Status, Tuning Protection Unlock

Status (Bit 4)

The Program Status and Tuning Protection Unlock

Status bit is used to identify a Program failure or a

Tuning Protection Code verify failure. Bit4 should

be read once the Program/Erase Controller Status

bit is High (Program/Erase Controller inactive).

When bit4 is set to ‘0’ the memory has successful-

ly verified that the device has programmed cor-

rectly or that the correct Tuning Protection Code

has been written. When bit4 is set to ‘1’ the device

has failed to verify that the data has been pro-

grammed correctly or that the correct Tuning Pro-

tection code has been written.

Once set to 1’, the Program Status bit can only be

reset to ‘0’ by a Clear Status Register command or

a hardware reset. If set to ‘1’ it should be reset be-

fore a new Program or Erase command is issued,

otherwise the new command will appear to fail.

VPP Status (Bit 3)

The VPP Status bit can be used to identify an in-

valid voltage on the VPP pin during fast program

and erase operations. The VPP pin is only sampled

at the beginning of a program or erase operation.

Indeterminate results can occur if VPP becomes in-

valid during a fast Program or Erase operation.

When the VPP Status bit is set to ‘0’, the voltage on

the VPP pin was sampled at a valid voltage; when

the VPP Status bit is set to ‘1’, the VPP pin has a

voltage that is below the VPP Lockout Voltage, VP-

PLK.

Once set to ‘1’, the VPP Status bit can only be reset

to ‘0’ by a Clear Status Register command or a

hardware reset. If set to ‘1’ it should be reset be-

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