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M58MR032CZC 数据表(PDF) 27 Page - STMicroelectronics

部件名 M58MR032CZC
功能描述  32 Mbit 2Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory
PDF  52 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M58MR032CZC 数据表(HTML) 27 Page - STMicroelectronics

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M58MR032C, M58MR032D
Table 21. Primary Algorithm-Specific Extended Query Table
Offset
Data
Description
Value
(P)h = 39h
0050h
Primary Algorithm extended Query table unique ASCII string “PRI”
"P"
0052h
"R"
0049h
"I"
(P+3)h = 3Ch
0031h
Major version number, ASCII
"1"
(P+4)h = 3Dh
0030h
Minor version number, ASCII
"0"
(P+5)h = 3Eh
00E6h
Extended Query table contents for Primary Algorithm. Address (P+5)h
contains less significant byte.
bit 0
Chip Erase supported
(1 = Yes, 0 = No)
bit 1
Erase Suspend supported
(1 = Yes, 0 = No)
bit 2
Program Suspend supported
(1 = Yes, 0 = No)
bit 3
Legacy Lock/Unlock supported
(1 = Yes, 0 = No)
bit 4
Queued Erase supported
(1 = Yes, 0 = No)
bit 5
Instant individual block locking supported (1 = Yes, 0 = No)
bit 6
Protection bits supported
(1 = Yes, 0 = No)
bit 7
Page mode read supported
(1 = Yes, 0 = No)
bit 8
Synchronous read supported
(1 = Yes, 0 = No)
bit 9
Simultaneous operation supported
(1 = Yes, 0 = No)
bit 10 to 31 Reserved; undefined bits are ‘0’. If bit 31 is ’1’ then another 31
bit field of optional features follows at the end of the bit-30
field.
No
Yes
Yes
No
No
Yes
Yes
Yes
Yes
Yes
0003h
(P+7)h
0000h
(P+8)h
0000h
(P+9)h = 42h
0001h
Supported Functions after Suspend
Read Array, Read Status Register and CFI Query
bit 0
Program supported after Erase Suspend (1 = Yes, 0 = No)
bit 7 to 1
Reserved; undefined bits are ‘0’
Yes
(P+A)h = 43h
0003h
Block Protect Status
Defines which bits in the Block Status Register section of the Query are
implemented.
bit 0
Block protect Status Register Protect/Unprotect
bit active
(1 = Yes, 0 = No)
bit 1
Block Lock Status Register Lock-Down bit active (1 = Yes, 0 = No)
bit 15 to 2
Reserved for future use; undefined bits are ‘0’
Yes
Yes
(P+B)h
0000h
(P+C)h = 45h
0018h
VDD Logic Supply Optimum Program/Erase voltage (highest performance)
bit 7 to 4
HEX value in volts
bit 3 to 0
BCD value in 100 mV
1.8V
(P+D)h = 46h
00C0h
VPP Supply Optimum Program/Erase voltage
bit 7 to 4
HEX value in volts
bit 3 to 0
BCD value in 100 mV
12V
(P+E)h = 47h
(P+F)h
(P+10)h
(P+11)h
(P+12)h
0000h
Reserved



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